#define AT91_SAMA5D2_EMR_OSR_64SAMPLES 3
#define AT91_SAMA5D2_EMR_OSR_256SAMPLES 4
+/* Extended Mode Register - TRACKX */
+#define AT91_SAMA5D2_TRACKX_MASK GENMASK(23, 22)
+#define AT91_SAMA5D2_TRACKX(x) (((x) << 22) & \
+ AT91_SAMA5D2_TRACKX_MASK)
/* Extended Mode Register - Averaging on single trigger event */
#define AT91_SAMA5D2_EMR_ASTE(V) ((V) << 20)
}
static int at91_adc_config_emr(struct at91_adc_state *st,
- u32 oversampling_ratio)
+ u32 oversampling_ratio, u32 trackx)
{
/* configure the extended mode register */
unsigned int emr = at91_adc_readl(st, EMR);
emr |= AT91_SAMA5D2_EMR_ASTE(1);
/* delete leftover content if it's the case */
- emr &= ~osr_mask;
+ emr &= ~(osr_mask | AT91_SAMA5D2_TRACKX_MASK);
/* select oversampling ratio from configuration */
switch (oversampling_ratio) {
break;
}
+ /* Update trackx. */
+ emr |= AT91_SAMA5D2_TRACKX(trackx);
at91_adc_writel(st, EMR, emr);
st->oversampling_ratio = oversampling_ratio;
return ret;
mutex_lock(&st->lock);
/* update ratio */
- ret = at91_adc_config_emr(st, val);
+ ret = at91_adc_config_emr(st, val, 0);
mutex_unlock(&st->lock);
iio_device_release_direct_mode(indio_dev);
return ret;
at91_adc_setup_samp_freq(indio_dev, st->soc_info.min_sample_rate);
/* configure extended mode register */
- at91_adc_config_emr(st, st->oversampling_ratio);
+ at91_adc_config_emr(st, st->oversampling_ratio, 0);
}
static ssize_t at91_adc_get_fifo_state(struct device *dev,