nand: add a new nand flash "TC58NVG2S0HBAI6" for SU customer
authorYi Zeng <“yi.zeng@amlogic.com”>
Mon, 14 Aug 2017 03:25:01 +0000 (11:25 +0800)
committerJianxin Pan <jianxin.pan@amlogic.com>
Mon, 14 Aug 2017 11:40:27 +0000 (04:40 -0700)
PD#149218: nand: add a new nand flash "TC58NVG2S0HBAI6" for SU customer

Change-Id: I06b832365db629bd4c46fa6b6fa6ab4656267602
Signed-off-by: Yi Zeng <“yi.zeng@amlogic.com”>
drivers/amlogic/mtd_meson8b/aml_hwctrl.h
drivers/amlogic/mtd_meson8b/m3_nand.c
drivers/amlogic/mtd_meson8b/nand_flash.c
drivers/mtd/nand/nand_base.c

index f38cd2f..8325ee8 100644 (file)
@@ -430,14 +430,9 @@ static inline void amlnf_clr_reg32_mask(uint32_t *_reg,
 #define NAND_ECC_NONE          (0x0)
 #define NAND_ECC_BCH8          (0x1)
 #define NAND_ECC_BCH8_1K       (0x2)
-#define NAND_ECC_BCH16_1K      (0x3)
-#define NAND_ECC_BCH24_1K      (0x4)
-#define NAND_ECC_BCH24_1K_M8   (0x3)
-#define NAND_ECC_BCH30_1K      (0x5)
-#define NAND_ECC_BCH30_1K_M8   (0x4)
-#define NAND_ECC_BCH40_1K      (0x6)
-#define NAND_ECC_BCH40_1K_M8   (0x5)
-#define NAND_ECC_BCH50_1K_M8   (0x6)
+#define NAND_ECC_BCH24_1K      (0x3)
+#define NAND_ECC_BCH30_1K      (0x4)
+#define NAND_ECC_BCH40_1K      (0x5)
 /*NAND_ECC_BCH50_1K only for mtd for general*/
 #define NAND_ECC_BCH50_1K      (0x6)
 #define NAND_ECC_BCH60_1K      (0x7)
index be28576..811ee9d 100644 (file)
@@ -455,17 +455,6 @@ static int m3_nand_options_confirm(struct aml_nand_chip *aml_chip)
                aml_chip->ecc_max = 8;
                chip->ecc.steps = mtd->writesize / chip->ecc.size;
                break;
-       /*don't support for new chip(greater than m8)*/
-       case NAND_ECC_BCH16_1K_MODE:
-               chip->ecc.strength = 16;
-               chip->ecc.size = NAND_ECC_UNIT_1KSIZE;
-               chip->ecc.bytes = NAND_BCH16_1K_ECC_SIZE;
-               aml_chip->bch_mode = NAND_ECC_BCH16_1K;
-               aml_chip->user_byte_mode = 2;
-               aml_chip->ecc_cnt_limit = 14;
-               aml_chip->ecc_max = 16;
-               chip->ecc.steps = mtd->writesize / chip->ecc.size;
-               break;
 
        case NAND_ECC_BCH24_1K_MODE:
                chip->ecc.strength = 24;
index 69c64c1..1dd5014 100644 (file)
@@ -314,6 +314,19 @@ struct aml_nand_flash_dev aml_nand_flash_ids[] = {
                0,
                (NAND_TIMING_MODE5 | NAND_ECC_BCH8_MODE)},
 
+       {"A revision NAND 512MB TC58NVG2S0HBAI6 ",
+               {NAND_MFR_TOSHIBA, 0xdc, 0x90, 0x26, 0x76},
+               4096,
+               512,
+               0x40000,
+               256,
+               1,
+               20,
+               25,
+               0,
+               0,
+               (NAND_TIMING_MODE5 | NAND_ECC_BCH8_MODE)},
+
        {"A revision NAND 2Gib MT29F2G08-A",
                {NAND_MFR_MICRON, 0xda, 0x90, 0x95, 0x06},
                2048,
index f222f8a..afeac4e 100644 (file)
@@ -4633,6 +4633,7 @@ int nand_scan_tail(struct mtd_info *mtd)
                        break;
                case 64:
                case 128:
+               case 256:
                        mtd_set_ooblayout(mtd, &nand_ooblayout_lp_hamming_ops);
                        break;
                default: