x86/decompressor: Merge trampoline cleanup with switching code
authorArd Biesheuvel <ardb@kernel.org>
Mon, 7 Aug 2023 16:27:12 +0000 (18:27 +0200)
committerBorislav Petkov (AMD) <bp@alien8.de>
Mon, 7 Aug 2023 18:51:17 +0000 (20:51 +0200)
Now that the trampoline setup code and the actual invocation of it are
all done from the C routine, the trampoline cleanup can be merged into
it as well, instead of returning to asm just to call another C function.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Acked-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Link: https://lore.kernel.org/r/20230807162720.545787-16-ardb@kernel.org
arch/x86/boot/compressed/head_64.S
arch/x86/boot/compressed/pgtable_64.c

index afdaf8c..fb0e562 100644 (file)
@@ -430,20 +430,14 @@ SYM_CODE_START(startup_64)
         * a trampoline in 32-bit addressable memory if the current number does
         * not match the desired number.
         *
-        * Pass the boot_params pointer as the first argument.
+        * Pass the boot_params pointer as the first argument. The second
+        * argument is the relocated address of the page table to use instead
+        * of the page table in trampoline memory (if required).
         */
        movq    %r15, %rdi
+       leaq    rva(top_pgtable)(%rbx), %rsi
        call    configure_5level_paging
 
-       /*
-        * cleanup_trampoline() would restore trampoline memory.
-        *
-        * RDI is address of the page table to use instead of page table
-        * in trampoline memory (if required).
-        */
-       leaq    rva(top_pgtable)(%rbx), %rdi
-       call    cleanup_trampoline
-
        /* Zero EFLAGS */
        pushq   $0
        popfq
index eab4e6b..7939eb6 100644 (file)
@@ -101,7 +101,7 @@ static unsigned long find_trampoline_placement(void)
        return bios_start - TRAMPOLINE_32BIT_SIZE;
 }
 
-asmlinkage void configure_5level_paging(struct boot_params *bp)
+asmlinkage void configure_5level_paging(struct boot_params *bp, void *pgtable)
 {
        void (*toggle_la57)(void *cr3);
        bool l5_required = false;
@@ -191,22 +191,12 @@ asmlinkage void configure_5level_paging(struct boot_params *bp)
        }
 
        toggle_la57(trampoline_32bit);
-}
-
-void cleanup_trampoline(void *pgtable)
-{
-       void *trampoline_pgtable;
-
-       trampoline_pgtable = trampoline_32bit;
 
        /*
-        * Move the top level page table out of trampoline memory,
-        * if it's there.
+        * Move the top level page table out of trampoline memory.
         */
-       if ((void *)__native_read_cr3() == trampoline_pgtable) {
-               memcpy(pgtable, trampoline_pgtable, PAGE_SIZE);
-               native_write_cr3((unsigned long)pgtable);
-       }
+       memcpy(pgtable, trampoline_32bit, PAGE_SIZE);
+       native_write_cr3((unsigned long)pgtable);
 
        /* Restore trampoline memory */
        memcpy(trampoline_32bit, trampoline_save, TRAMPOLINE_32BIT_SIZE);