2016-12-15 Richard Earnshaw <rearnsha@arm.com>
+ * arm-opts.h (struct arm_arch_core_flag): Add new field ISA.
+ Initialize it.
+ (arm_arch_core_flag): Delete flags field.
+ (arm_arch_core_flags): Don't initialize flags field.
+ * common/config/arm/arm-common.c (check_isa_bits_for): New function.
+ (arm_target_thumb_only): Use new isa bits arrays.
+
+2016-12-15 Richard Earnshaw <rearnsha@arm.com>
+
* arm-protos.h (insn_flags): Delete declaration.
(arm_arch7ve): Declare.
* arm.c (insn_flags): Delete.
struct arm_arch_core_flag
{
const char *const name;
- const arm_feature_set flags;
+ const enum isa_feature isa_bits[isa_num_bits];
};
static const struct arm_arch_core_flag arm_arch_core_flags[] =
{
#undef ARM_CORE
#define ARM_CORE(NAME, X, IDENT, TUNE_FLAGS, ARCH, ISA, FLAGS, COSTS) \
- {NAME, FLAGS},
+ {NAME, {ISA isa_nobit}},
#include "config/arm/arm-cores.def"
#undef ARM_CORE
#undef ARM_ARCH
#define ARM_ARCH(NAME, CORE, TUNE_FLAGS, ARCH, ISA, FLAGS) \
- {NAME, FLAGS},
+ {NAME, {ISA isa_nobit}},
#include "config/arm/arm-arches.def"
#undef ARM_ARCH
};
+/* Scan over a raw feature array BITS checking for BIT being present.
+ This is slower than the normal bitmask checks, but we would spend longer
+ initializing that than doing the check this way. Returns true iff
+ BIT is found. */
+static bool
+check_isa_bits_for (const enum isa_feature* bits, enum isa_feature bit)
+{
+ while (*bits != isa_nobit)
+ if (*bits++ == bit)
+ return true;
+
+ return false;
+}
+
/* Called by the driver to check whether the target denoted by current
command line options is a Thumb-only target. ARGV is an array of
-march and -mcpu values (ie. it contains the rhs after the equal
{
for (opt = 0; opt < (ARRAY_SIZE (arm_arch_core_flags)); opt++)
if ((strcmp (argv[argc - 1], arm_arch_core_flags[opt].name) == 0)
- && !ARM_FSET_HAS_CPU1(arm_arch_core_flags[opt].flags, FL_NOTM))
+ && !check_isa_bits_for (arm_arch_core_flags[opt].isa_bits,
+ isa_bit_notm))
return "-mthumb";
return NULL;