#include "tl1.h"
PNAME(sd_emmc_parent_names) = { "xtal", "fclk_div2",
- "fclk_div3", "fclk_div5", "fclk_div7", "mpll2", "mpll3", "gp0_pll" };
+ "fclk_div3", "fclk_div5", "fclk_div2p5", "mpll2", "mpll3", "gp0_pll" };
/*sd_emmc B*/
static MUX(sd_emmc_p0_mux_B, HHI_SD_EMMC_CLK_CNTL, 0x7, 25,
sd_emmc_parent_names, CLK_GET_RATE_NOCACHE | CLK_IGNORE_UNUSED);
host->mux_parent[0]);
if (ret)
pr_warn("set comp0 as mux_clk parent error\n");
- } else if (((host->data->chip_type == MMC_CHIP_TL1)
+ } else if (((host->data->chip_type >= MMC_CHIP_TL1)
|| (host->data->chip_type == MMC_CHIP_G12B))
&& (clk_ios >= 166000000)) {
src0_clk = devm_clk_get(host->dev, "clkin2");