mmc: omap_hsmmc: add DDR support
authorBalaji T K <balajitk@ti.com>
Mon, 9 Apr 2012 06:38:33 +0000 (12:08 +0530)
committerChris Ball <cjb@laptop.org>
Sun, 22 Apr 2012 15:16:47 +0000 (11:16 -0400)
Add Dual data rate support for omap_hsmmc.

Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Venkatraman S <svenkatr@ti.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
drivers/mmc/host/omap_hsmmc.c

index dfa6f87..dc41b9e 100644 (file)
@@ -92,6 +92,7 @@
 #define MSBS                   (1 << 5)
 #define BCE                    (1 << 1)
 #define FOUR_BIT               (1 << 1)
+#define DDR                    (1 << 19)
 #define DW8                    (1 << 5)
 #define CC                     0x1
 #define TC                     0x02
@@ -523,6 +524,10 @@ static void omap_hsmmc_set_bus_width(struct omap_hsmmc_host *host)
        u32 con;
 
        con = OMAP_HSMMC_READ(host->base, CON);
+       if (ios->timing == MMC_TIMING_UHS_DDR50)
+               con |= DDR;     /* configure in DDR mode */
+       else
+               con &= ~DDR;
        switch (ios->bus_width) {
        case MMC_BUS_WIDTH_8:
                OMAP_HSMMC_WRITE(host->base, CON, con | DW8);