* Suspend/resume *
* *
\*****************************************************************************/
+static void sdhci_set_emmc_state(struct sdhci_host *host, uint32_t state)
+{
+ /* Only if there is dekker mutex available */
+ if (!host->sram_addr)
+ return;
+ writel(state, host->sram_addr + DEKKER_EMMC_STATE);
+}
#ifdef CONFIG_PM
if (ret)
goto out;
+ /* Card succesfully suspended. Tell information to SCU */
+ sdhci_set_emmc_state(host, DEKKER_EMMC_CHIP_SUSPENDED);
free_irq(host->irq, host);
out:
mmiowb();
ret = mmc_resume_host(host->mmc);
+ /* Card back in active state */
+ sdhci_set_emmc_state(host, DEKKER_EMMC_CHIP_ACTIVE);
sdhci_enable_card_detection(host);
/* Set the re-tuning expiration flag */
int irq; /* Device IRQ */
void __iomem *ioaddr; /* Mapped address */
- /* XXX: SCU/X86 mutex variables base address in shared SRAM */
+ /*
+ * XXX: SCU/X86 mutex variables base address in shared SRAM
+ * NOTE: Max size of this struct is 16 bytes
+ * without shared SRAM re-organization.
+ */
void __iomem *sram_addr; /* Shared SRAM address */
#define DEKKER_EMMC_OWNER_OFFSET 0
#define DEKKER_IA_REQ_OFFSET 0x04
#define DEKKER_SCU_REQ_OFFSET 0x08
+ /* 0xc offset: state of the emmc chip to SCU. */
+ #define DEKKER_EMMC_STATE 0x0c
#define DEKKER_OWNER_IA 0
#define DEKKER_OWNER_SCU 1
+ #define DEKKER_EMMC_CHIP_ACTIVE 0
+ #define DEKKER_EMMC_CHIP_SUSPENDED 1
atomic_t usage_cnt; /* eMMC mutex usage count */