Renesas ARM Based SoC Updates for v5.3
* Auto-enable RZ/A1 IRQC on RZ/A1H and RZ/A2M
* Don't init CNTVOFF/counter if PSCI is available
* tag 'renesas-arm-soc-for-v5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
soc: renesas: Enable RZ/A1 IRQC on RZ/A1H and RZ/A2M
ARM: mach-shmobile: Don't init CNTVOFF/counter if PSCI is available
Signed-off-by: Olof Johansson <olof@lixom.net>