[neurun] Replace ITensor to our own (#3739)
author김수진/동작제어Lab(SR)/Engineer/삼성전자 <sjsujin.kim@samsung.com>
Fri, 30 Nov 2018 04:10:00 +0000 (13:10 +0900)
committer오형석/동작제어Lab(SR)/Staff Engineer/삼성전자 <hseok82.oh@samsung.com>
Fri, 30 Nov 2018 04:10:00 +0000 (13:10 +0900)
Related : #3273
Part of : #3700

This commit replaces `arm_compute::ITensor` to `neurun::operand::ITensor` finally.

Replaced below classes
- ITensor
- ICLTensor
- CLTensor
- CLSubTensor

Signed-off-by: sjsujinkim <sjsujin.kim@samsung.com>
25 files changed:
runtimes/neurun/src/backend/acl_cl/StageGenerator.cc
runtimes/neurun/src/backend/acl_cl/TensorBuilder.cc
runtimes/neurun/src/backend/acl_cl/TensorBuilder.h
runtimes/neurun/src/backend/acl_cl/kernel/View.h
runtimes/neurun/src/backend/acl_cl/operand/Object.cc
runtimes/neurun/src/backend/acl_cl/operand/Object.h
runtimes/neurun/src/backend/cpu/TensorBuilder.cc
runtimes/neurun/src/backend/cpu/TensorBuilder.h
runtimes/neurun/src/backend/cpu/operand/Object.cc
runtimes/neurun/src/backend/cpu/operand/Object.h
runtimes/neurun/src/backend/cpu/operand/Tensor.h
runtimes/neurun/src/backend/interface/ITensorBuilder.h
runtimes/neurun/src/backend/interface/operand/IObject.h
runtimes/neurun/src/compiler/ConstantInitializer.cc
runtimes/neurun/src/compiler/TensorInfo.h
runtimes/neurun/src/compiler/operand/Context.h
runtimes/neurun/src/exec/Sink.h
runtimes/neurun/src/exec/Source.h
runtimes/neurun/src/frontend/execution.cc
runtimes/neurun/src/internal/nnapi/kernel/View.h
runtimes/neurun/src/kernel/acl_cl/ConcatLayer.cc
runtimes/neurun/src/kernel/acl_cl/ConcatLayer.h
runtimes/neurun/src/kernel/cpu/PermuteLayer.cc
runtimes/neurun/src/kernel/cpu/PermuteLayer.h
runtimes/neurun/src/util/feature/nchw/View.h

index eb2fe62..00e4948 100644 (file)
@@ -202,13 +202,14 @@ void StageGenerator::visit(const graph::operation::Conv2DNode &node)
 
     std::unique_ptr<::arm_compute::CLConvolutionLayer> fn{new ::arm_compute::CLConvolutionLayer};
 
-    fn->configure(ifm_alloc, ker_alloc, bias_alloc, ofm_alloc, conv_info);
+    fn->configure(ifm_alloc->handle(), ker_alloc->handle(), bias_alloc->handle(),
+                  ofm_alloc->handle(), conv_info);
 
     auto acl_fn = make_cl_function(std::move(fn));
 
     builder.append(std::move(acl_fn));
 
-    ActivationBuilder{builder}.append(param.activation, ofm_alloc);
+    ActivationBuilder{builder}.append(param.activation, ofm_alloc->handle());
   });
 }
 
@@ -292,7 +293,7 @@ void StageGenerator::visit(const graph::operation::MaxPool2DNode &node)
 
     std::unique_ptr<::arm_compute::CLPoolingLayer> fn{new ::arm_compute::CLPoolingLayer};
 
-    fn->configure(ifm_alloc, ofm_alloc, info);
+    fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), info);
 
     auto acl_fn = make_cl_function(std::move(fn));
 
@@ -384,7 +385,7 @@ void StageGenerator::visit(const graph::operation::AvgPool2DNode &node)
 
     std::unique_ptr<::arm_compute::CLPoolingLayer> fn{new ::arm_compute::CLPoolingLayer};
 
-    fn->configure(ifm_alloc, ofm_alloc, info);
+    fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), info);
 
     auto acl_fn = make_cl_function(std::move(fn));
 
@@ -435,16 +436,18 @@ void StageGenerator::visit(const graph::operation::ConcatNode &node)
 
     auto output_alloc = tensors->at(param.output_index).get();
 
-    std::vector<::arm_compute::ICLTensor *> input_allocs;
+    std::vector<::neurun::backend::acl_cl::operand::ICLTensor *> input_allocs;
     for (auto ifm_ind : param.input_indexes)
     {
-      input_allocs.emplace_back(tensors->at(ifm_ind).get());
+      input_allocs.emplace_back(
+          dynamic_cast<::neurun::backend::acl_cl::operand::CLTensor *>(tensors->at(ifm_ind).get()));
     }
 
     std::unique_ptr<::neurun::kernel::acl_cl::ConcatLayer> fn{
         new ::neurun::kernel::acl_cl::ConcatLayer};
 
-    fn->configure(input_allocs, param.axis, output_alloc);
+    fn->configure(input_allocs, param.axis,
+                  dynamic_cast<::neurun::backend::acl_cl::operand::CLTensor *>(output_alloc));
 
     auto acl_fn = make_cl_function(std::move(fn));
 
@@ -493,13 +496,14 @@ void StageGenerator::visit(const graph::operation::FullyConnectedNode &node)
 
     auto fn = make_layer<::arm_compute::CLFullyConnectedLayer>();
 
-    fn->configure(input_alloc, weight_alloc, bias_alloc, output_alloc);
+    fn->configure(input_alloc->handle(), weight_alloc->handle(), bias_alloc->handle(),
+                  output_alloc->handle());
 
     auto acl_fn = make_cl_function(std::move(fn));
 
-    builder.append((std::move(acl_fn)));
+    builder.append(std::move(acl_fn));
 
-    ActivationBuilder{builder}.append(param.activation, output_alloc);
+    ActivationBuilder{builder}.append(param.activation, output_alloc->handle());
   });
 }
 
@@ -527,11 +531,11 @@ void StageGenerator::visit(const graph::operation::ReshapeNode &node)
 
     auto fn = make_layer<::arm_compute::CLReshapeLayer>();
 
-    fn->configure(input_alloc, output_alloc);
+    fn->configure(input_alloc->handle(), output_alloc->handle());
 
     auto acl_fn = make_cl_function(std::move(fn));
 
-    builder.append((std::move(acl_fn)));
+    builder.append(std::move(acl_fn));
   });
 }
 
@@ -564,11 +568,11 @@ void StageGenerator::visit(const graph::operation::SoftmaxNode &node)
 
     auto fn = make_layer<::arm_compute::CLSoftmaxLayer>();
 
-    fn->configure(input_alloc, output_alloc, param.scale);
+    fn->configure(input_alloc->handle(), output_alloc->handle(), param.scale);
 
     auto acl_fn = make_cl_function(std::move(fn));
 
-    builder.append((std::move(acl_fn)));
+    builder.append(std::move(acl_fn));
   });
 }
 
index 9e8652e..71d3590 100644 (file)
@@ -75,10 +75,7 @@ void TensorBuilder::prepare(void)
   {
     auto ind = entry.first;
     const auto &info = entry.second;
-    // TODO : If our CLTensor is introduced, it can be get compiler::TensorInfo directly.
-    auto tensor_info = ::internal::asTensorInfo(info.shape(), info.typeInfo());
-    auto tensor = std::make_shared<::arm_compute::CLTensor>();
-    tensor->allocator()->init(tensor_info);
+    auto tensor = std::make_shared<::neurun::backend::acl_cl::operand::CLTensor>(info);
     _tensors[ind] = tensor;
   }
 
@@ -112,7 +109,7 @@ void TensorBuilder::prepare(void)
       }
 
       auto parent = info.parent();
-      std::shared_ptr<::arm_compute::ICLTensor> parent_tensor;
+      std::shared_ptr<::neurun::backend::acl_cl::operand::ICLTensor> parent_tensor;
 
       if (_tensors.find(parent) != _tensors.end())
       {
@@ -146,8 +143,8 @@ void TensorBuilder::prepare(void)
       assert(info.offset().n() == 0);
       assert(info.offset().w() == 0);
       coordinates[2] = info.offset().c();
-      auto tensor = std::make_shared<::arm_compute::CLSubTensor>(parent_tensor.get(), shape,
-                                                                 coordinates, true);
+      auto tensor = std::make_shared<::neurun::backend::acl_cl::operand::CLSubTensor>(
+          parent_tensor.get(), shape, coordinates, true);
       _subtensors[current] = tensor;
       stack.pop();
     }
@@ -165,7 +162,8 @@ void TensorBuilder::allocate(void)
   }
 }
 
-std::shared_ptr<::arm_compute::ITensor> TensorBuilder::tensorAt(const graph::operand::Index &ind)
+std::shared_ptr<::neurun::backend::operand::ITensor>
+TensorBuilder::tensorAt(const graph::operand::Index &ind)
 {
   if (_tensors.find(ind) != _tensors.end())
   {
@@ -202,7 +200,7 @@ void TensorBuilder::iterate(const IterateFunction &fn)
   }
 }
 
-std::shared_ptr<::arm_compute::ICLTensor>
+std::shared_ptr<::neurun::backend::acl_cl::operand::ICLTensor>
 TensorBuilder::at(const ::neurun::graph::operand::Index &ind)
 {
   if (_tensors.find(ind) != _tensors.end())
index 1a04159..a0c0168 100644 (file)
 #define __NEURUN_BACKEND_ACL_CL_TENSOR_BUILDER_H__
 
 #include "backend/interface/ITensorBuilder.h"
+#include "backend/acl_cl/operand/CLTensor.h"
+#include "backend/acl_cl/operand/CLSubTensor.h"
 
 #include <unordered_map>
 
-#include <arm_compute/runtime/CL/CLTensor.h>
-#include <arm_compute/runtime/CL/CLSubTensor.h>
-
 namespace neurun
 {
 namespace backend
@@ -57,13 +56,14 @@ public:
   virtual void prepare(void) override;
   virtual void allocate(void) override;
 
-  virtual std::shared_ptr<::arm_compute::ITensor>
+  virtual std::shared_ptr<::neurun::backend::operand::ITensor>
   tensorAt(const graph::operand::Index &ind) override;
   virtual std::shared_ptr<backend::operand::IObject>
   wrapTensor(const graph::operand::Index &ind) override;
   virtual void iterate(const IterateFunction &fn) override;
 
-  std::shared_ptr<::arm_compute::ICLTensor> at(const ::neurun::graph::operand::Index &ind);
+  std::shared_ptr<::neurun::backend::acl_cl::operand::ICLTensor>
+  at(const ::neurun::graph::operand::Index &ind);
   /**
    * @brief     Check child tensor is allocated as subtensor of parent tensor
    * @param[in] parent  Index of parent
@@ -75,8 +75,11 @@ public:
 private:
   std::unordered_map<graph::operand::Index, compiler::TensorInfo> _tensor_info_map;
   std::unordered_map<graph::operand::Index, compiler::SubTensorInfo> _subtensor_info_map;
-  std::unordered_map<graph::operand::Index, std::shared_ptr<::arm_compute::CLTensor>> _tensors;
-  std::unordered_map<graph::operand::Index, std::shared_ptr<::arm_compute::CLSubTensor>>
+  std::unordered_map<graph::operand::Index,
+                     std::shared_ptr<::neurun::backend::acl_cl::operand::CLTensor>>
+      _tensors;
+  std::unordered_map<graph::operand::Index,
+                     std::shared_ptr<::neurun::backend::acl_cl::operand::CLSubTensor>>
       _subtensors;
 };
 
index aec9a88..a7d8191 100644 (file)
@@ -19,8 +19,7 @@
 
 #include "util/kernel/Shape.h"
 #include "util/kernel/Reader.h"
-
-#include <arm_compute/core/ITensor.h>
+#include "backend/acl_cl/operand/ICLTensor.h"
 
 #include <cassert>
 
@@ -36,14 +35,14 @@ template <typename T> class View;
 template <> class View<float> final : public nnfw::util::kernel::Reader<float>
 {
 public:
-  View(::arm_compute::ITensor *tensor) : _tensor{tensor}
+  View(::neurun::backend::acl_cl::operand::ICLTensor *tensor) : _tensor{tensor}
   {
-    assert(tensor->info()->data_type() == ::arm_compute::DataType::F32);
+    assert(tensor->data_type() == ::arm_compute::DataType::F32);
 
-    _shape.N = tensor->info()->dimension(3);
-    _shape.C = tensor->info()->dimension(2);
-    _shape.H = tensor->info()->dimension(1);
-    _shape.W = tensor->info()->dimension(0);
+    _shape.N = tensor->dimension(3);
+    _shape.C = tensor->dimension(2);
+    _shape.H = tensor->dimension(1);
+    _shape.W = tensor->dimension(0);
   }
 
 public:
@@ -77,7 +76,7 @@ private:
 
 private:
   ::nnfw::util::kernel::Shape _shape;
-  ::arm_compute::ITensor *_tensor;
+  ::neurun::backend::acl_cl::operand::ICLTensor *_tensor;
 };
 
 } // namespace kernel
index 98b96a1..a84fa23 100644 (file)
@@ -27,7 +27,8 @@ namespace acl_cl
 namespace operand
 {
 
-void Object::access(const std::function<void(::arm_compute::ITensor &tensor)> &fn) const
+void Object::access(
+    const std::function<void(::neurun::backend::operand::ITensor &tensor)> &fn) const
 {
   auto &queue = ::arm_compute::CLScheduler::get().queue();
 
index 4a4c384..4ba22b2 100644 (file)
@@ -18,9 +18,9 @@
 #define __NEURUN_BACKEND_ACL_CL_OPERAND_OBJECT_H__
 
 #include <memory>
-#include <arm_compute/core/CL/ICLTensor.h>
 
 #include "backend/interface/operand/IObject.h"
+#include "backend/acl_cl/operand/ICLTensor.h"
 
 namespace neurun
 {
@@ -37,19 +37,21 @@ public:
   Object() = default;
 
 public:
-  Object(const std::shared_ptr<::arm_compute::ICLTensor> &tensor) : _tensor{tensor}
+  Object(const std::shared_ptr<::neurun::backend::acl_cl::operand::ICLTensor> &tensor)
+      : _tensor{tensor}
   {
     // DO NOTHING
   }
 
 public:
-  ::arm_compute::ICLTensor *ptr(void) const override { return _tensor.get(); }
+  ::neurun::backend::acl_cl::operand::ICLTensor *ptr(void) const override { return _tensor.get(); }
 
 private:
-  std::shared_ptr<::arm_compute::ICLTensor> _tensor;
+  std::shared_ptr<::neurun::backend::acl_cl::operand::ICLTensor> _tensor;
 
 public:
-  void access(const std::function<void(::arm_compute::ITensor &tensor)> &fn) const override;
+  void
+  access(const std::function<void(::neurun::backend::operand::ITensor &tensor)> &fn) const override;
 };
 
 } // namespace operand
index 998ede9..a6fb782 100644 (file)
@@ -73,9 +73,7 @@ void TensorBuilder::prepare(void)
     const auto &info = _tensor_info_map[ind];
 
     uint8_t *buffer = _mem_alloc->base() + mem_blk.offset;
-    // TODO : operand::Tensor should get compiler::TensorInfo
-    auto tensor_info = ::internal::asTensorInfo(info.shape(), info.typeInfo());
-    auto tensor = std::make_shared<operand::Tensor>(tensor_info);
+    auto tensor = std::make_shared<operand::Tensor>(info);
     tensor->setBuffer(buffer);
     _tensors[ind] = tensor;
 
@@ -91,7 +89,8 @@ void TensorBuilder::allocate(void)
   // NOTE For now nothing to do. Allocation is done in prepare stage, which is wrong
 }
 
-std::shared_ptr<::arm_compute::ITensor> TensorBuilder::tensorAt(const graph::operand::Index &ind)
+std::shared_ptr<::neurun::backend::operand::ITensor>
+TensorBuilder::tensorAt(const graph::operand::Index &ind)
 {
   return _tensors.at(ind);
 }
index 750db5d..98dd8ea 100644 (file)
@@ -57,7 +57,7 @@ public:
   virtual void prepare(void) override;
   virtual void allocate(void) override;
 
-  virtual std::shared_ptr<::arm_compute::ITensor>
+  virtual std::shared_ptr<::neurun::backend::operand::ITensor>
   tensorAt(const graph::operand::Index &ind) override;
   virtual std::shared_ptr<backend::operand::IObject>
   wrapTensor(const graph::operand::Index &ind) override;
index 52b63fb..011747a 100644 (file)
@@ -25,7 +25,8 @@ namespace cpu
 namespace operand
 {
 
-void Object::access(const std::function<void(::arm_compute::ITensor &tensor)> &fn) const
+void Object::access(
+    const std::function<void(::neurun::backend::operand::ITensor &tensor)> &fn) const
 {
   fn(*_tensor);
 }
index a2af9b1..5ef7c4f 100644 (file)
@@ -18,7 +18,7 @@
 #define __NEURUN_BACKEND_CPU_OPERAND_OBJECT_H__
 
 #include <memory>
-#include <arm_compute/core/ITensor.h>
+#include "backend/interface/operand/ITensor.h"
 
 #include "backend/interface/operand/IObject.h"
 
@@ -37,19 +37,20 @@ public:
   Object() = default;
 
 public:
-  Object(const std::shared_ptr<::arm_compute::ITensor> &tensor) : _tensor{tensor}
+  Object(const std::shared_ptr<::neurun::backend::operand::ITensor> &tensor) : _tensor{tensor}
   {
     // DO NOTHING
   }
 
 public:
-  ::arm_compute::ITensor *ptr(void) const override { return _tensor.get(); }
+  ::neurun::backend::operand::ITensor *ptr(void) const override { return _tensor.get(); }
 
 private:
-  std::shared_ptr<::arm_compute::ITensor> _tensor;
+  std::shared_ptr<::neurun::backend::operand::ITensor> _tensor;
 
 public:
-  void access(const std::function<void(::arm_compute::ITensor &tensor)> &fn) const override;
+  void
+  access(const std::function<void(::neurun::backend::operand::ITensor &tensor)> &fn) const override;
 };
 
 } // namespace operand
index 5ac7e67..2c0144d 100644 (file)
@@ -17,8 +17,8 @@
 #ifndef __NEURUN_BACKEND_CPU_OPERAND_TENSOR_H__
 #define __NEURUN_BACKEND_CPU_OPERAND_TENSOR_H__
 
-#include <arm_compute/core/ITensor.h>
-#include <arm_compute/core/TensorInfo.h>
+#include "backend/interface/operand/ITensor.h"
+#include "compiler/TensorInfo.h"
 
 namespace neurun
 {
@@ -29,36 +29,39 @@ namespace cpu
 namespace operand
 {
 
-class Tensor : public ::arm_compute::ITensor
+class Tensor : public ::neurun::backend::operand::ITensor
 {
 public:
-  Tensor() = default;
+  Tensor() = delete;
 
-  Tensor(::arm_compute::TensorInfo info) : _info(info)
-  {
-    // DO NOTHING
-  }
-
-  Tensor(uint8_t *buffer) : _buffer(buffer)
+public:
+  Tensor(const compiler::TensorInfo &info) : _info(info)
   {
     // DO NOTHING
   }
 
 public:
   void setBuffer(uint8_t *buffer) { _buffer = buffer; }
+  ::neurun::graph::operand::DataType data_type() const { return _info.typeInfo().type(); }
 
 public:
-  ::arm_compute::TensorInfo *info() const override
-  {
-    return const_cast<::arm_compute::TensorInfo *>(&_info);
-  }
-
-  ::arm_compute::TensorInfo *info() override { return &_info; }
-
   uint8_t *buffer() const override { return _buffer; }
+  /**
+   * @brief Get dimension by index
+   *
+   * @param index Index to get diemension
+   * @return size_t Dimension at index
+   * @note N : dimension(0)
+   *       H : dimension(1)
+   *       W : dimension(2)
+   *       C : dimension(3)
+   */
+  size_t dimension(size_t index) const override { return _info.shape().dim(index); }
+  size_t num_dimensions() const override { return _info.shape().dims().size(); }
+  size_t total_size() const override { return _info.total_size(); }
 
 private:
-  ::arm_compute::TensorInfo _info;
+  compiler::TensorInfo _info;
   uint8_t *_buffer = nullptr;
 };
 
index 95e8e82..bf3abd0 100644 (file)
@@ -23,6 +23,7 @@
 #include "operand/IObject.h"
 #include "compiler/SubTensorInfo.h"
 #include "compiler/TensorInfo.h"
+#include "backend/interface/operand/ITensor.h"
 
 namespace neurun
 {
@@ -52,7 +53,8 @@ struct ITensorBuilder
   virtual void prepare(void) = 0;
   virtual void allocate(void) = 0;
 
-  virtual std::shared_ptr<::arm_compute::ITensor> tensorAt(const graph::operand::Index &ind) = 0;
+  virtual std::shared_ptr<::neurun::backend::operand::ITensor>
+  tensorAt(const graph::operand::Index &ind) = 0;
   virtual std::shared_ptr<backend::operand::IObject>
   wrapTensor(const graph::operand::Index &ind) = 0;
   virtual void iterate(const IterateFunction &fn) = 0;
index f7d5110..44b33b0 100644 (file)
@@ -19,7 +19,7 @@
 
 #include <functional>
 
-#include <arm_compute/core/ITensor.h>
+#include "ITensor.h"
 
 namespace neurun
 {
@@ -31,8 +31,9 @@ namespace operand
 struct IObject
 {
   virtual ~IObject() = default;
-  virtual ::arm_compute::ITensor *ptr(void) const = 0;
-  virtual void access(const std::function<void(::arm_compute::ITensor &tensor)> &fn) const = 0;
+  virtual ::neurun::backend::operand::ITensor *ptr(void) const = 0;
+  virtual void
+  access(const std::function<void(::neurun::backend::operand::ITensor &tensor)> &fn) const = 0;
 };
 
 } // namespace operand
index a592133..1d40a15 100644 (file)
@@ -17,6 +17,7 @@
 #include "ConstantInitializer.h"
 
 #include "backend/interface/operand/IObject.h"
+#include "backend/acl_cl/operand/CLTensor.h"
 #include "backend/interface/IConfig.h"
 #include "backend/acl_cl/kernel/View.h"
 #include "backend/BackendManager.h"
@@ -60,7 +61,7 @@ void ConstantInitializer::operator()()
     auto base = model_obj.data().base();
     auto size = model_obj.data().size();
 
-    obj.access([&](::arm_compute::ITensor &tensor) {
+    obj.access([&](::neurun::backend::operand::ITensor &tensor) {
       switch (shape.rank())
       {
         case 1:
@@ -154,7 +155,9 @@ void ConstantInitializer::operator()()
 
           if (layout == neurun::graph::operand::Layout::NHWC)
           {
-            auto into = ::internal::nnapi::kernel::View<float>{&tensor};
+            auto cpu_tensor = dynamic_cast<::neurun::backend::cpu::operand::Tensor *>(&tensor);
+
+            auto into = ::internal::nnapi::kernel::View<float>{cpu_tensor};
 
             ::nnfw::util::kernel::iterate(ker_shape)
                 << [&](uint32_t nth, uint32_t ch, uint32_t row, uint32_t col) {
@@ -166,7 +169,9 @@ void ConstantInitializer::operator()()
           {
             assert(layout == neurun::graph::operand::Layout::NCHW);
 
-            auto into = ::internal::arm_compute::kernel::View<float>{&tensor};
+            auto acl_tensor = dynamic_cast<::neurun::backend::acl_cl::operand::CLTensor *>(&tensor);
+
+            auto into = ::internal::arm_compute::kernel::View<float>{acl_tensor};
 
             ::nnfw::util::kernel::iterate(ker_shape)
                 << [&](uint32_t nth, uint32_t ch, uint32_t row, uint32_t col) {
index a968ead..5641d75 100644 (file)
@@ -20,6 +20,8 @@
 #include "graph/operand/Shape.h"
 #include "graph/operand/TypeInfo.h"
 
+#include <numeric>
+
 namespace neurun
 {
 namespace compiler
index 969d5b3..4e8cb5b 100644 (file)
@@ -21,6 +21,7 @@
 #include "graph/operand/Index.h"
 
 #include <map>
+#include <memory>
 
 namespace neurun
 {
index c9747d7..6dafc8e 100644 (file)
 
 #include <cassert>
 
-#include <arm_compute/core/ITensor.h>
 #include "nnfw/std/memory.h"
 #include "kernel/cpu/PermuteLayer.h"
 #include "backend/cpu/operand/Tensor.h"
 #include "util/feature/nhwc/View.h"
 #include "util/feature/nchw/View.h"
 #include <util/feature/IndexIterator.h>
+#include "backend/interface/operand/ITensor.h"
+
+// TODO Remove these dependencies to arm_compute lib
+#include <arm_compute/core/Window.h>
+#include <arm_compute/core/Helpers.h>
 
 namespace neurun
 {
@@ -36,7 +40,7 @@ struct ISink
 {
   virtual ~ISink() = default;
 
-  virtual void pull(::arm_compute::ITensor &tensor) const = 0;
+  virtual void pull(::neurun::backend::operand::ITensor &tensor) const = 0;
 };
 
 template <typename T> class Sink final : public ISink
@@ -45,7 +49,7 @@ public:
   Sink(T *base, const size_t size) : _base{base}, _size{size} {}
 
 public:
-  void pull(::arm_compute::ITensor &tensor) const override
+  void pull(::neurun::backend::operand::ITensor &tensor) const override
   {
     memcpy(_base, tensor.buffer(), _size);
   }
@@ -64,14 +68,16 @@ public:
   }
 
 public:
-  void pull(::arm_compute::ITensor &tensor) const override
+  void pull(neurun::backend::operand::ITensor &tensor) const override
   {
     // do NCHW_TO_NHWC permutation
     auto input_buffer = tensor.buffer();
 
     auto output_buffer = _output.buffer();
-    auto output_size = _output.info()->total_size();
+    auto output_size = _output.total_size();
     auto rank = _shape.rank();
+
+    auto input_cl = dynamic_cast<::neurun::backend::acl_cl::operand::ICLTensor *>(&tensor);
     switch (rank)
     {
       case 0:
@@ -86,9 +92,9 @@ public:
         using ::arm_compute::Iterator;
 
         Window window;
-        window.use_tensor_dimensions(tensor.info()->tensor_shape(), Window::DimY);
+        window.use_tensor_dimensions(input_cl->info()->tensor_shape(), Window::DimY);
 
-        Iterator it(&tensor, window);
+        Iterator it(input_cl->handle(), window);
 
         int output_width = _shape.asMatrix().W;
 
@@ -108,9 +114,9 @@ public:
         const int32_t width = _shape.dim(2);
 
         Window window;
-        window.use_tensor_dimensions(tensor.info()->tensor_shape(), Window::DimY);
+        window.use_tensor_dimensions(input_cl->info()->tensor_shape(), Window::DimY);
 
-        Iterator it(&tensor, window);
+        Iterator it(input_cl->handle(), window);
 
         const auto &z = window[Window::DimZ];
         const auto &y = window[Window::DimY];
@@ -129,7 +135,7 @@ public:
         auto feature = _shape.asFeature();
 
         // TODO Fix this workaround (We may need codegen::operand::Object instead of ITensor)
-        const util::feature::nchw::View<float> from{&tensor};
+        const util::feature::nchw::View<float> from{input_cl};
         util::feature::nhwc::View<float> into{feature, reinterpret_cast<float *>(output_buffer),
                                               output_size};
 
index 86c7ec5..21058c6 100644 (file)
 
 #include <cassert>
 
-#include <arm_compute/core/ITensor.h>
 #include "kernel/cpu/PermuteLayer.h"
 #include "nnfw/std/memory.h"
 #include "backend/cpu/operand/Tensor.h"
 #include "util/feature/nchw/View.h"
 #include "util/feature/nhwc/Reader.h"
 #include <util/feature/IndexIterator.h>
+#include "backend/interface/operand/ITensor.h"
+
+// TODO Remove these dependencies to arm_compute lib
+#include <arm_compute/core/Window.h>
+#include <arm_compute/core/Helpers.h>
 
 namespace neurun
 {
@@ -36,7 +40,7 @@ struct ISource
 {
   virtual ~ISource() = default;
 
-  virtual void push(::arm_compute::ITensor &tensor) const = 0;
+  virtual void push(::neurun::backend::operand::ITensor &tensor) const = 0;
 };
 
 template <typename T> class Source final : public ISource
@@ -45,7 +49,7 @@ public:
   Source(const T *base, const size_t size) : _base{base}, _size{size} {}
 
 public:
-  void push(::arm_compute::ITensor &tensor) const override
+  void push(::neurun::backend::operand::ITensor &tensor) const override
   {
     memcpy(tensor.buffer(), _base, _size);
   }
@@ -64,14 +68,16 @@ public:
   }
 
 public:
-  void push(::arm_compute::ITensor &tensor) const override
+  void push(neurun::backend::operand::ITensor &tensor) const override
   {
     // do NHWC_TO_NCHW permutation
     auto input_buffer = _input.buffer();
-    auto input_size = _input.info()->total_size();
+    auto input_size = _input.total_size();
 
     auto output_buffer = tensor.buffer();
     auto rank = _shape.rank();
+
+    auto output_cl = dynamic_cast<::neurun::backend::acl_cl::operand::ICLTensor *>(&tensor);
     switch (rank)
     {
       case 0:
@@ -88,9 +94,9 @@ public:
         auto matrix_shape = _shape.asMatrix();
 
         Window window;
-        window.use_tensor_dimensions(tensor.info()->tensor_shape(), Window::DimY);
+        window.use_tensor_dimensions(output_cl->info()->tensor_shape(), Window::DimY);
 
-        Iterator it(&tensor, window);
+        Iterator it(output_cl->handle(), window);
 
         const auto &y = window[Window::DimY];
         for (auto h = y.start(); h < y.end(); h += y.step(), it.increment(Window::DimY))
@@ -109,9 +115,9 @@ public:
         const int32_t width = _shape.dim(2);
 
         Window window;
-        window.use_tensor_dimensions(tensor.info()->tensor_shape(), Window::DimY);
+        window.use_tensor_dimensions(output_cl->info()->tensor_shape(), Window::DimY);
 
-        Iterator it(&tensor, window);
+        Iterator it(output_cl->handle(), window);
 
         const auto &z = window[Window::DimZ];
         const auto &y = window[Window::DimY];
@@ -131,7 +137,7 @@ public:
 
         const util::feature::nhwc::Reader<float> from{
             feature, reinterpret_cast<const float *>(input_buffer), input_size};
-        util::feature::nchw::View<float> into{&tensor};
+        util::feature::nchw::View<float> into{output_cl};
 
         // TODO Fix this workaround (We may need codegen::operand::Object instead of ITensor)
         ::nnfw::util::feature::iterate(feature)
index 64ed46a..db5ee35 100644 (file)
@@ -31,6 +31,8 @@
 #include "backend/BackendManager.h"
 #include "backend/interface/IConfig.h"
 #include "compiler/BackendResolver.h"
+#include "compiler/TensorInfo.h"
+#include "backend/interface/operand/ITensor.h"
 
 inline void source(ANeuralNetworksExecution *execution,
                    const ::neurun::graph::operand::DataType &type, int32_t index,
@@ -53,7 +55,7 @@ inline void source(ANeuralNetworksExecution *execution,
   if (input_layout == neurun::graph::operand::Layout::NHWC &&
       output_layout == neurun::graph::operand::Layout::NCHW)
   {
-    const auto tensor_info = ::internal::asTensorInfo(operand->shape(), operand->typeInfo());
+    const auto tensor_info = neurun::compiler::TensorInfo(operand->shape(), operand->typeInfo());
     auto tensor_from_interp = neurun::backend::cpu::operand::Tensor(tensor_info);
     tensor_from_interp.setBuffer((uint8_t *)buffer);
 
@@ -108,7 +110,7 @@ inline void sink(ANeuralNetworksExecution *execution,
   if (input_layout == neurun::graph::operand::Layout::NCHW &&
       output_layout == neurun::graph::operand::Layout::NHWC)
   {
-    const auto tensor_info = ::internal::asTensorInfo(operand->shape(), operand->typeInfo());
+    const auto tensor_info = neurun::compiler::TensorInfo(operand->shape(), operand->typeInfo());
     auto tensor_from_interp = neurun::backend::cpu::operand::Tensor(tensor_info);
     tensor_from_interp.setBuffer((uint8_t *)buffer);
 
@@ -243,7 +245,9 @@ int ANeuralNetworksExecution_startCompute(ANeuralNetworksExecution *execution,
   // Set input(s)
   for (uint32_t n = 0; n < model.getInputs().size(); ++n)
   {
-    auto setter = [&](::arm_compute::ITensor &tensor) { execution->source(n).push(tensor); };
+    auto setter = [&](::neurun::backend::operand::ITensor &tensor) {
+      execution->source(n).push(tensor);
+    };
 
     neurun::graph::operand::IO::Index input_index{n};
 
@@ -263,7 +267,9 @@ int ANeuralNetworksExecution_startCompute(ANeuralNetworksExecution *execution,
   // Get output(s)
   for (uint32_t n = 0; n < model.getOutputs().size(); ++n)
   {
-    auto getter = [&](::arm_compute::ITensor &tensor) { execution->sink(n).pull(tensor); };
+    auto getter = [&](::neurun::backend::operand::ITensor &tensor) {
+      execution->sink(n).pull(tensor);
+    };
 
     neurun::graph::operand::IO::Index output_index{n};
 
index 86d19b8..f496868 100644 (file)
@@ -20,7 +20,7 @@
 #include "util/kernel/Shape.h"
 #include "util/kernel/Reader.h"
 
-#include <arm_compute/core/ITensor.h>
+#include "backend/cpu/operand/Tensor.h"
 
 namespace internal
 {
@@ -32,14 +32,14 @@ namespace kernel
 template <typename T> class View final : public nnfw::util::kernel::Reader<float>
 {
 public:
-  View(::arm_compute::ITensor *tensor) : _tensor{tensor}
+  View(::neurun::backend::cpu::operand::Tensor *tensor) : _tensor{tensor}
   {
-    assert(tensor->info()->data_type() == ::arm_compute::DataType::F32);
+    assert(tensor->data_type() == ::neurun::graph::operand::DataType::TENSOR_FLOAT32);
 
-    _shape.N = tensor->info()->dimension(3);
-    _shape.C = tensor->info()->dimension(2);
-    _shape.H = tensor->info()->dimension(1);
-    _shape.W = tensor->info()->dimension(0);
+    _shape.N = tensor->dimension(0);
+    _shape.C = tensor->dimension(3);
+    _shape.H = tensor->dimension(1);
+    _shape.W = tensor->dimension(2);
   }
 
 public:
@@ -78,7 +78,7 @@ public:
 
 private:
   nnfw::util::kernel::Shape _shape;
-  ::arm_compute::ITensor *_tensor;
+  ::neurun::backend::cpu::operand::Tensor *_tensor;
 };
 
 } // namespace kernel
index b75ac90..6d07972 100644 (file)
 namespace
 {
 
-bool matchSizeExceptAxis(const ::arm_compute::ICLTensor *t1, const ::arm_compute::ICLTensor *t2,
-                         uint32_t axis)
+bool matchSizeExceptAxis(const ::neurun::backend::acl_cl::operand::ICLTensor *t1,
+                         const ::neurun::backend::acl_cl::operand::ICLTensor *t2, uint32_t axis)
 {
-  assert(t1->info()->num_dimensions() <= 4);
-  assert(t2->info()->num_dimensions() <= 4);
+  assert(t1->num_dimensions() <= 4);
+  assert(t2->num_dimensions() <= 4);
 
   for (uint32_t i = 0; i < 4; i++)
   {
     if (axis == i)
       continue;
-    if (t1->info()->dimension(i) != t2->info()->dimension(i))
+    if (t1->dimension(i) != t2->dimension(i))
       return false;
   }
   return true;
@@ -66,10 +66,10 @@ bool ConcatLayer::concatenationFloat32()
     for (auto input : _input_allocs)
     {
       assert(matchSizeExceptAxis(_output_alloc, input, _axis));
-      axis_sum += input->info()->dimension(_axis);
+      axis_sum += input->dimension(_axis);
     }
 
-    assert(_output_alloc->info()->dimension(_axis) == axis_sum);
+    assert(_output_alloc->dimension(_axis) == axis_sum);
   }
 
   VERBOSE(Concat_RUN) << "START Concat" << std::endl;
@@ -124,8 +124,9 @@ bool ConcatLayer::concatenationFloat32()
   return true;
 }
 
-void ConcatLayer::configure(const std::vector<::arm_compute::ICLTensor *> &input_allocs,
-                            int32_t axis, ::arm_compute::ICLTensor *output_alloc)
+void ConcatLayer::configure(
+    const std::vector<::neurun::backend::acl_cl::operand::ICLTensor *> &input_allocs, int32_t axis,
+    ::neurun::backend::acl_cl::operand::ICLTensor *output_alloc)
 {
   _input_allocs = input_allocs;
   _output_alloc = output_alloc;
index 97ddce4..52a6979 100644 (file)
 
 #include <NeuralNetworks.h>
 
-#include <arm_compute/core/CL/ICLTensor.h>
 #include <arm_compute/runtime/IFunction.h>
 
 #include "graph/operand/DataType.h"
+#include "backend/acl_cl/operand/ICLTensor.h"
 
 using OperandType = neurun::graph::operand::DataType;
 
@@ -44,9 +44,9 @@ public:
   ConcatLayer();
 
 public:
-  void configure(const std::vector<::arm_compute::ICLTensor *> &input_allocs,
+  void configure(const std::vector<::neurun::backend::acl_cl::operand::ICLTensor *> &input_allocs,
                  int32_t axis /* NNAPI tensor axis from NHWC order */,
-                 ::arm_compute::ICLTensor *output_alloc);
+                 ::neurun::backend::acl_cl::operand::ICLTensor *output_alloc);
 
   void run();
 
@@ -54,8 +54,8 @@ private:
   bool concatenationFloat32();
 
 private:
-  std::vector<::arm_compute::ICLTensor *> _input_allocs;
-  ::arm_compute::ICLTensor *_output_alloc;
+  std::vector<::neurun::backend::acl_cl::operand::ICLTensor *> _input_allocs;
+  ::neurun::backend::acl_cl::operand::ICLTensor *_output_alloc;
   int32_t _axis;
   OperandType _input_type;
 };
index 503d49e..9a0498e 100644 (file)
@@ -24,7 +24,7 @@
 
 // TODO Remove these dependencies to arm_compute lib
 #include <arm_compute/runtime/CL/CLScheduler.h>
-#include <arm_compute/core/CL/ICLTensor.h>
+#include "backend/acl_cl/operand/CLTensor.h"
 
 namespace neurun
 {
@@ -33,7 +33,8 @@ namespace kernel
 namespace cpu
 {
 
-void PermuteLayer::configure(::arm_compute::ITensor *input, ::arm_compute::ITensor *output,
+void PermuteLayer::configure(::neurun::backend::operand::ITensor *input,
+                             ::neurun::backend::operand::ITensor *output,
                              const graph::operand::Shape &shape, Type type)
 {
   _input = input;
@@ -45,10 +46,10 @@ void PermuteLayer::configure(::arm_compute::ITensor *input, ::arm_compute::ITens
 void PermuteLayer::run()
 {
   auto input_buffer = _input->buffer();
-  auto input_size = _input->info()->total_size();
+  auto input_size = _input->total_size();
 
   auto output_buffer = _output->buffer();
-  auto output_size = _output->info()->total_size();
+  auto output_size = _output->total_size();
 
   auto rank = _shape.rank();
 
@@ -58,7 +59,7 @@ void PermuteLayer::run()
     {
       // TODO Fix this workaround (We may need backend::operand::IObject instead of ITensor)
       auto &queue = ::arm_compute::CLScheduler::get().queue();
-      auto _output_cl = dynamic_cast<::arm_compute::ICLTensor *>(_output);
+      auto _output_cl = dynamic_cast<::neurun::backend::acl_cl::operand::ICLTensor *>(_output);
       _output_cl->map(queue);
       switch (rank)
       {
@@ -76,9 +77,9 @@ void PermuteLayer::run()
           auto matrix_shape = _shape.asMatrix();
 
           Window window;
-          window.use_tensor_dimensions(_output->info()->tensor_shape(), Window::DimY);
+          window.use_tensor_dimensions(_output_cl->info()->tensor_shape(), Window::DimY);
 
-          Iterator it(_output, window);
+          Iterator it(_output_cl->handle(), window);
 
           const auto &y = window[Window::DimY];
           for (auto h = y.start(); h < y.end(); h += y.step(), it.increment(Window::DimY))
@@ -97,9 +98,9 @@ void PermuteLayer::run()
           const int32_t width = _shape.dim(2);
 
           Window window;
-          window.use_tensor_dimensions(_output->info()->tensor_shape(), Window::DimY);
+          window.use_tensor_dimensions(_output_cl->info()->tensor_shape(), Window::DimY);
 
-          Iterator it(_output, window);
+          Iterator it(_output_cl->handle(), window);
 
           const auto &z = window[Window::DimZ];
           const auto &y = window[Window::DimY];
@@ -119,7 +120,7 @@ void PermuteLayer::run()
 
           const util::feature::nhwc::Reader<float> from{
               feature, reinterpret_cast<const float *>(input_buffer), input_size};
-          util::feature::nchw::View<float> into{_output};
+          util::feature::nchw::View<float> into{_output_cl};
 
           ::nnfw::util::feature::iterate(feature)
               << [&](uint32_t batch, uint32_t ch, uint32_t row, uint32_t col) {
@@ -140,7 +141,7 @@ void PermuteLayer::run()
     {
       // TODO Fix this workaround (We may need backend::operand::IObject instead of ITensor)
       auto &queue = ::arm_compute::CLScheduler::get().queue();
-      auto _input_cl = dynamic_cast<::arm_compute::ICLTensor *>(_input);
+      auto _input_cl = dynamic_cast<::neurun::backend::acl_cl::operand::ICLTensor *>(_input);
       _input_cl->map(queue);
       switch (rank)
       {
@@ -156,9 +157,9 @@ void PermuteLayer::run()
           using ::arm_compute::Iterator;
 
           Window window;
-          window.use_tensor_dimensions(_input->info()->tensor_shape(), Window::DimY);
+          window.use_tensor_dimensions(_input_cl->info()->tensor_shape(), Window::DimY);
 
-          Iterator it(_input, window);
+          Iterator it(_input_cl->handle(), window);
 
           int output_width = _shape.asMatrix().W;
 
@@ -179,9 +180,9 @@ void PermuteLayer::run()
           const int32_t width = _shape.dim(2);
 
           Window window;
-          window.use_tensor_dimensions(_input->info()->tensor_shape(), Window::DimY);
+          window.use_tensor_dimensions(_input_cl->info()->tensor_shape(), Window::DimY);
 
-          Iterator it(_input, window);
+          Iterator it(_input_cl->handle(), window);
 
           const auto &z = window[Window::DimZ];
           const auto &y = window[Window::DimY];
@@ -199,7 +200,7 @@ void PermuteLayer::run()
         {
           auto feature = _shape.asFeature();
 
-          const util::feature::nchw::View<float> from{_input};
+          const util::feature::nchw::View<float> from{_input_cl};
           util::feature::nhwc::View<float> into{feature, reinterpret_cast<float *>(output_buffer),
                                                 output_size};
 
index 293e995..39b0a71 100644 (file)
 #include <NeuralNetworks.h>
 
 #include "exec/interface/IFunction.h"
-#include <arm_compute/core/ITensor.h>
 
 #include "util/feature/nhwc/View.h"
 #include "OperationUtils.h"
+#include "backend/interface/operand/ITensor.h"
 
 namespace neurun
 {
@@ -46,13 +46,14 @@ public:
   PermuteLayer() = default;
 
 public:
-  void configure(::arm_compute::ITensor *input, ::arm_compute::ITensor *output,
-                 const graph::operand::Shape &shape, Type type);
+  void configure(::neurun::backend::operand::ITensor *input,
+                 ::neurun::backend::operand::ITensor *output, const graph::operand::Shape &shape,
+                 Type type);
   void run();
 
 private:
-  ::arm_compute::ITensor *_input;
-  ::arm_compute::ITensor *_output;
+  ::neurun::backend::operand::ITensor *_input;
+  ::neurun::backend::operand::ITensor *_output;
   graph::operand::Shape _shape;
   Type _type;
 };
index 2d9f83a..ca9cb4f 100644 (file)
@@ -19,7 +19,7 @@
 
 #include "util/feature/Reader.h"
 
-#include <arm_compute/core/ITensor.h>
+#include "backend/acl_cl/operand/ICLTensor.h"
 
 #include <cassert>
 
@@ -35,15 +35,15 @@ namespace nchw
 template <typename T> class View final : public nnfw::util::feature::Reader<T>
 {
 public:
-  View(::arm_compute::ITensor *tensor) : _tensor{tensor}
+  View(::neurun::backend::acl_cl::operand::ICLTensor *tensor) : _tensor{tensor}
   {
-    assert(tensor->info()->data_type() == ::arm_compute::DataType::F32);
+    assert(tensor->data_type() == ::arm_compute::DataType::F32);
 
     // TODO Validate whether tensor is a feature map, or not
 
-    _shape.C = tensor->info()->dimension(2);
-    _shape.H = tensor->info()->dimension(1);
-    _shape.W = tensor->info()->dimension(0);
+    _shape.C = tensor->dimension(2);
+    _shape.H = tensor->dimension(1);
+    _shape.W = tensor->dimension(0);
   }
 
 public:
@@ -100,7 +100,7 @@ private:
 
 private:
   ::nnfw::util::feature::Shape _shape;
-  ::arm_compute::ITensor *_tensor;
+  ::neurun::backend::acl_cl::operand::ICLTensor *_tensor;
 };
 
 } // namespace nchw