std::unique_ptr<::arm_compute::CLConvolutionLayer> fn{new ::arm_compute::CLConvolutionLayer};
- fn->configure(ifm_alloc, ker_alloc, bias_alloc, ofm_alloc, conv_info);
+ fn->configure(ifm_alloc->handle(), ker_alloc->handle(), bias_alloc->handle(),
+ ofm_alloc->handle(), conv_info);
auto acl_fn = make_cl_function(std::move(fn));
builder.append(std::move(acl_fn));
- ActivationBuilder{builder}.append(param.activation, ofm_alloc);
+ ActivationBuilder{builder}.append(param.activation, ofm_alloc->handle());
});
}
std::unique_ptr<::arm_compute::CLPoolingLayer> fn{new ::arm_compute::CLPoolingLayer};
- fn->configure(ifm_alloc, ofm_alloc, info);
+ fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), info);
auto acl_fn = make_cl_function(std::move(fn));
std::unique_ptr<::arm_compute::CLPoolingLayer> fn{new ::arm_compute::CLPoolingLayer};
- fn->configure(ifm_alloc, ofm_alloc, info);
+ fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), info);
auto acl_fn = make_cl_function(std::move(fn));
auto output_alloc = tensors->at(param.output_index).get();
- std::vector<::arm_compute::ICLTensor *> input_allocs;
+ std::vector<::neurun::backend::acl_cl::operand::ICLTensor *> input_allocs;
for (auto ifm_ind : param.input_indexes)
{
- input_allocs.emplace_back(tensors->at(ifm_ind).get());
+ input_allocs.emplace_back(
+ dynamic_cast<::neurun::backend::acl_cl::operand::CLTensor *>(tensors->at(ifm_ind).get()));
}
std::unique_ptr<::neurun::kernel::acl_cl::ConcatLayer> fn{
new ::neurun::kernel::acl_cl::ConcatLayer};
- fn->configure(input_allocs, param.axis, output_alloc);
+ fn->configure(input_allocs, param.axis,
+ dynamic_cast<::neurun::backend::acl_cl::operand::CLTensor *>(output_alloc));
auto acl_fn = make_cl_function(std::move(fn));
auto fn = make_layer<::arm_compute::CLFullyConnectedLayer>();
- fn->configure(input_alloc, weight_alloc, bias_alloc, output_alloc);
+ fn->configure(input_alloc->handle(), weight_alloc->handle(), bias_alloc->handle(),
+ output_alloc->handle());
auto acl_fn = make_cl_function(std::move(fn));
- builder.append((std::move(acl_fn)));
+ builder.append(std::move(acl_fn));
- ActivationBuilder{builder}.append(param.activation, output_alloc);
+ ActivationBuilder{builder}.append(param.activation, output_alloc->handle());
});
}
auto fn = make_layer<::arm_compute::CLReshapeLayer>();
- fn->configure(input_alloc, output_alloc);
+ fn->configure(input_alloc->handle(), output_alloc->handle());
auto acl_fn = make_cl_function(std::move(fn));
- builder.append((std::move(acl_fn)));
+ builder.append(std::move(acl_fn));
});
}
auto fn = make_layer<::arm_compute::CLSoftmaxLayer>();
- fn->configure(input_alloc, output_alloc, param.scale);
+ fn->configure(input_alloc->handle(), output_alloc->handle(), param.scale);
auto acl_fn = make_cl_function(std::move(fn));
- builder.append((std::move(acl_fn)));
+ builder.append(std::move(acl_fn));
});
}
{
auto ind = entry.first;
const auto &info = entry.second;
- // TODO : If our CLTensor is introduced, it can be get compiler::TensorInfo directly.
- auto tensor_info = ::internal::asTensorInfo(info.shape(), info.typeInfo());
- auto tensor = std::make_shared<::arm_compute::CLTensor>();
- tensor->allocator()->init(tensor_info);
+ auto tensor = std::make_shared<::neurun::backend::acl_cl::operand::CLTensor>(info);
_tensors[ind] = tensor;
}
}
auto parent = info.parent();
- std::shared_ptr<::arm_compute::ICLTensor> parent_tensor;
+ std::shared_ptr<::neurun::backend::acl_cl::operand::ICLTensor> parent_tensor;
if (_tensors.find(parent) != _tensors.end())
{
assert(info.offset().n() == 0);
assert(info.offset().w() == 0);
coordinates[2] = info.offset().c();
- auto tensor = std::make_shared<::arm_compute::CLSubTensor>(parent_tensor.get(), shape,
- coordinates, true);
+ auto tensor = std::make_shared<::neurun::backend::acl_cl::operand::CLSubTensor>(
+ parent_tensor.get(), shape, coordinates, true);
_subtensors[current] = tensor;
stack.pop();
}
}
}
-std::shared_ptr<::arm_compute::ITensor> TensorBuilder::tensorAt(const graph::operand::Index &ind)
+std::shared_ptr<::neurun::backend::operand::ITensor>
+TensorBuilder::tensorAt(const graph::operand::Index &ind)
{
if (_tensors.find(ind) != _tensors.end())
{
}
}
-std::shared_ptr<::arm_compute::ICLTensor>
+std::shared_ptr<::neurun::backend::acl_cl::operand::ICLTensor>
TensorBuilder::at(const ::neurun::graph::operand::Index &ind)
{
if (_tensors.find(ind) != _tensors.end())
#define __NEURUN_BACKEND_ACL_CL_TENSOR_BUILDER_H__
#include "backend/interface/ITensorBuilder.h"
+#include "backend/acl_cl/operand/CLTensor.h"
+#include "backend/acl_cl/operand/CLSubTensor.h"
#include <unordered_map>
-#include <arm_compute/runtime/CL/CLTensor.h>
-#include <arm_compute/runtime/CL/CLSubTensor.h>
-
namespace neurun
{
namespace backend
virtual void prepare(void) override;
virtual void allocate(void) override;
- virtual std::shared_ptr<::arm_compute::ITensor>
+ virtual std::shared_ptr<::neurun::backend::operand::ITensor>
tensorAt(const graph::operand::Index &ind) override;
virtual std::shared_ptr<backend::operand::IObject>
wrapTensor(const graph::operand::Index &ind) override;
virtual void iterate(const IterateFunction &fn) override;
- std::shared_ptr<::arm_compute::ICLTensor> at(const ::neurun::graph::operand::Index &ind);
+ std::shared_ptr<::neurun::backend::acl_cl::operand::ICLTensor>
+ at(const ::neurun::graph::operand::Index &ind);
/**
* @brief Check child tensor is allocated as subtensor of parent tensor
* @param[in] parent Index of parent
private:
std::unordered_map<graph::operand::Index, compiler::TensorInfo> _tensor_info_map;
std::unordered_map<graph::operand::Index, compiler::SubTensorInfo> _subtensor_info_map;
- std::unordered_map<graph::operand::Index, std::shared_ptr<::arm_compute::CLTensor>> _tensors;
- std::unordered_map<graph::operand::Index, std::shared_ptr<::arm_compute::CLSubTensor>>
+ std::unordered_map<graph::operand::Index,
+ std::shared_ptr<::neurun::backend::acl_cl::operand::CLTensor>>
+ _tensors;
+ std::unordered_map<graph::operand::Index,
+ std::shared_ptr<::neurun::backend::acl_cl::operand::CLSubTensor>>
_subtensors;
};
#include "util/kernel/Shape.h"
#include "util/kernel/Reader.h"
-
-#include <arm_compute/core/ITensor.h>
+#include "backend/acl_cl/operand/ICLTensor.h"
#include <cassert>
template <> class View<float> final : public nnfw::util::kernel::Reader<float>
{
public:
- View(::arm_compute::ITensor *tensor) : _tensor{tensor}
+ View(::neurun::backend::acl_cl::operand::ICLTensor *tensor) : _tensor{tensor}
{
- assert(tensor->info()->data_type() == ::arm_compute::DataType::F32);
+ assert(tensor->data_type() == ::arm_compute::DataType::F32);
- _shape.N = tensor->info()->dimension(3);
- _shape.C = tensor->info()->dimension(2);
- _shape.H = tensor->info()->dimension(1);
- _shape.W = tensor->info()->dimension(0);
+ _shape.N = tensor->dimension(3);
+ _shape.C = tensor->dimension(2);
+ _shape.H = tensor->dimension(1);
+ _shape.W = tensor->dimension(0);
}
public:
private:
::nnfw::util::kernel::Shape _shape;
- ::arm_compute::ITensor *_tensor;
+ ::neurun::backend::acl_cl::operand::ICLTensor *_tensor;
};
} // namespace kernel
namespace operand
{
-void Object::access(const std::function<void(::arm_compute::ITensor &tensor)> &fn) const
+void Object::access(
+ const std::function<void(::neurun::backend::operand::ITensor &tensor)> &fn) const
{
auto &queue = ::arm_compute::CLScheduler::get().queue();
#define __NEURUN_BACKEND_ACL_CL_OPERAND_OBJECT_H__
#include <memory>
-#include <arm_compute/core/CL/ICLTensor.h>
#include "backend/interface/operand/IObject.h"
+#include "backend/acl_cl/operand/ICLTensor.h"
namespace neurun
{
Object() = default;
public:
- Object(const std::shared_ptr<::arm_compute::ICLTensor> &tensor) : _tensor{tensor}
+ Object(const std::shared_ptr<::neurun::backend::acl_cl::operand::ICLTensor> &tensor)
+ : _tensor{tensor}
{
// DO NOTHING
}
public:
- ::arm_compute::ICLTensor *ptr(void) const override { return _tensor.get(); }
+ ::neurun::backend::acl_cl::operand::ICLTensor *ptr(void) const override { return _tensor.get(); }
private:
- std::shared_ptr<::arm_compute::ICLTensor> _tensor;
+ std::shared_ptr<::neurun::backend::acl_cl::operand::ICLTensor> _tensor;
public:
- void access(const std::function<void(::arm_compute::ITensor &tensor)> &fn) const override;
+ void
+ access(const std::function<void(::neurun::backend::operand::ITensor &tensor)> &fn) const override;
};
} // namespace operand
const auto &info = _tensor_info_map[ind];
uint8_t *buffer = _mem_alloc->base() + mem_blk.offset;
- // TODO : operand::Tensor should get compiler::TensorInfo
- auto tensor_info = ::internal::asTensorInfo(info.shape(), info.typeInfo());
- auto tensor = std::make_shared<operand::Tensor>(tensor_info);
+ auto tensor = std::make_shared<operand::Tensor>(info);
tensor->setBuffer(buffer);
_tensors[ind] = tensor;
// NOTE For now nothing to do. Allocation is done in prepare stage, which is wrong
}
-std::shared_ptr<::arm_compute::ITensor> TensorBuilder::tensorAt(const graph::operand::Index &ind)
+std::shared_ptr<::neurun::backend::operand::ITensor>
+TensorBuilder::tensorAt(const graph::operand::Index &ind)
{
return _tensors.at(ind);
}
virtual void prepare(void) override;
virtual void allocate(void) override;
- virtual std::shared_ptr<::arm_compute::ITensor>
+ virtual std::shared_ptr<::neurun::backend::operand::ITensor>
tensorAt(const graph::operand::Index &ind) override;
virtual std::shared_ptr<backend::operand::IObject>
wrapTensor(const graph::operand::Index &ind) override;
namespace operand
{
-void Object::access(const std::function<void(::arm_compute::ITensor &tensor)> &fn) const
+void Object::access(
+ const std::function<void(::neurun::backend::operand::ITensor &tensor)> &fn) const
{
fn(*_tensor);
}
#define __NEURUN_BACKEND_CPU_OPERAND_OBJECT_H__
#include <memory>
-#include <arm_compute/core/ITensor.h>
+#include "backend/interface/operand/ITensor.h"
#include "backend/interface/operand/IObject.h"
Object() = default;
public:
- Object(const std::shared_ptr<::arm_compute::ITensor> &tensor) : _tensor{tensor}
+ Object(const std::shared_ptr<::neurun::backend::operand::ITensor> &tensor) : _tensor{tensor}
{
// DO NOTHING
}
public:
- ::arm_compute::ITensor *ptr(void) const override { return _tensor.get(); }
+ ::neurun::backend::operand::ITensor *ptr(void) const override { return _tensor.get(); }
private:
- std::shared_ptr<::arm_compute::ITensor> _tensor;
+ std::shared_ptr<::neurun::backend::operand::ITensor> _tensor;
public:
- void access(const std::function<void(::arm_compute::ITensor &tensor)> &fn) const override;
+ void
+ access(const std::function<void(::neurun::backend::operand::ITensor &tensor)> &fn) const override;
};
} // namespace operand
#ifndef __NEURUN_BACKEND_CPU_OPERAND_TENSOR_H__
#define __NEURUN_BACKEND_CPU_OPERAND_TENSOR_H__
-#include <arm_compute/core/ITensor.h>
-#include <arm_compute/core/TensorInfo.h>
+#include "backend/interface/operand/ITensor.h"
+#include "compiler/TensorInfo.h"
namespace neurun
{
namespace operand
{
-class Tensor : public ::arm_compute::ITensor
+class Tensor : public ::neurun::backend::operand::ITensor
{
public:
- Tensor() = default;
+ Tensor() = delete;
- Tensor(::arm_compute::TensorInfo info) : _info(info)
- {
- // DO NOTHING
- }
-
- Tensor(uint8_t *buffer) : _buffer(buffer)
+public:
+ Tensor(const compiler::TensorInfo &info) : _info(info)
{
// DO NOTHING
}
public:
void setBuffer(uint8_t *buffer) { _buffer = buffer; }
+ ::neurun::graph::operand::DataType data_type() const { return _info.typeInfo().type(); }
public:
- ::arm_compute::TensorInfo *info() const override
- {
- return const_cast<::arm_compute::TensorInfo *>(&_info);
- }
-
- ::arm_compute::TensorInfo *info() override { return &_info; }
-
uint8_t *buffer() const override { return _buffer; }
+ /**
+ * @brief Get dimension by index
+ *
+ * @param index Index to get diemension
+ * @return size_t Dimension at index
+ * @note N : dimension(0)
+ * H : dimension(1)
+ * W : dimension(2)
+ * C : dimension(3)
+ */
+ size_t dimension(size_t index) const override { return _info.shape().dim(index); }
+ size_t num_dimensions() const override { return _info.shape().dims().size(); }
+ size_t total_size() const override { return _info.total_size(); }
private:
- ::arm_compute::TensorInfo _info;
+ compiler::TensorInfo _info;
uint8_t *_buffer = nullptr;
};
#include "operand/IObject.h"
#include "compiler/SubTensorInfo.h"
#include "compiler/TensorInfo.h"
+#include "backend/interface/operand/ITensor.h"
namespace neurun
{
virtual void prepare(void) = 0;
virtual void allocate(void) = 0;
- virtual std::shared_ptr<::arm_compute::ITensor> tensorAt(const graph::operand::Index &ind) = 0;
+ virtual std::shared_ptr<::neurun::backend::operand::ITensor>
+ tensorAt(const graph::operand::Index &ind) = 0;
virtual std::shared_ptr<backend::operand::IObject>
wrapTensor(const graph::operand::Index &ind) = 0;
virtual void iterate(const IterateFunction &fn) = 0;
#include <functional>
-#include <arm_compute/core/ITensor.h>
+#include "ITensor.h"
namespace neurun
{
struct IObject
{
virtual ~IObject() = default;
- virtual ::arm_compute::ITensor *ptr(void) const = 0;
- virtual void access(const std::function<void(::arm_compute::ITensor &tensor)> &fn) const = 0;
+ virtual ::neurun::backend::operand::ITensor *ptr(void) const = 0;
+ virtual void
+ access(const std::function<void(::neurun::backend::operand::ITensor &tensor)> &fn) const = 0;
};
} // namespace operand
#include "ConstantInitializer.h"
#include "backend/interface/operand/IObject.h"
+#include "backend/acl_cl/operand/CLTensor.h"
#include "backend/interface/IConfig.h"
#include "backend/acl_cl/kernel/View.h"
#include "backend/BackendManager.h"
auto base = model_obj.data().base();
auto size = model_obj.data().size();
- obj.access([&](::arm_compute::ITensor &tensor) {
+ obj.access([&](::neurun::backend::operand::ITensor &tensor) {
switch (shape.rank())
{
case 1:
if (layout == neurun::graph::operand::Layout::NHWC)
{
- auto into = ::internal::nnapi::kernel::View<float>{&tensor};
+ auto cpu_tensor = dynamic_cast<::neurun::backend::cpu::operand::Tensor *>(&tensor);
+
+ auto into = ::internal::nnapi::kernel::View<float>{cpu_tensor};
::nnfw::util::kernel::iterate(ker_shape)
<< [&](uint32_t nth, uint32_t ch, uint32_t row, uint32_t col) {
{
assert(layout == neurun::graph::operand::Layout::NCHW);
- auto into = ::internal::arm_compute::kernel::View<float>{&tensor};
+ auto acl_tensor = dynamic_cast<::neurun::backend::acl_cl::operand::CLTensor *>(&tensor);
+
+ auto into = ::internal::arm_compute::kernel::View<float>{acl_tensor};
::nnfw::util::kernel::iterate(ker_shape)
<< [&](uint32_t nth, uint32_t ch, uint32_t row, uint32_t col) {
#include "graph/operand/Shape.h"
#include "graph/operand/TypeInfo.h"
+#include <numeric>
+
namespace neurun
{
namespace compiler
#include "graph/operand/Index.h"
#include <map>
+#include <memory>
namespace neurun
{
#include <cassert>
-#include <arm_compute/core/ITensor.h>
#include "nnfw/std/memory.h"
#include "kernel/cpu/PermuteLayer.h"
#include "backend/cpu/operand/Tensor.h"
#include "util/feature/nhwc/View.h"
#include "util/feature/nchw/View.h"
#include <util/feature/IndexIterator.h>
+#include "backend/interface/operand/ITensor.h"
+
+// TODO Remove these dependencies to arm_compute lib
+#include <arm_compute/core/Window.h>
+#include <arm_compute/core/Helpers.h>
namespace neurun
{
{
virtual ~ISink() = default;
- virtual void pull(::arm_compute::ITensor &tensor) const = 0;
+ virtual void pull(::neurun::backend::operand::ITensor &tensor) const = 0;
};
template <typename T> class Sink final : public ISink
Sink(T *base, const size_t size) : _base{base}, _size{size} {}
public:
- void pull(::arm_compute::ITensor &tensor) const override
+ void pull(::neurun::backend::operand::ITensor &tensor) const override
{
memcpy(_base, tensor.buffer(), _size);
}
}
public:
- void pull(::arm_compute::ITensor &tensor) const override
+ void pull(neurun::backend::operand::ITensor &tensor) const override
{
// do NCHW_TO_NHWC permutation
auto input_buffer = tensor.buffer();
auto output_buffer = _output.buffer();
- auto output_size = _output.info()->total_size();
+ auto output_size = _output.total_size();
auto rank = _shape.rank();
+
+ auto input_cl = dynamic_cast<::neurun::backend::acl_cl::operand::ICLTensor *>(&tensor);
switch (rank)
{
case 0:
using ::arm_compute::Iterator;
Window window;
- window.use_tensor_dimensions(tensor.info()->tensor_shape(), Window::DimY);
+ window.use_tensor_dimensions(input_cl->info()->tensor_shape(), Window::DimY);
- Iterator it(&tensor, window);
+ Iterator it(input_cl->handle(), window);
int output_width = _shape.asMatrix().W;
const int32_t width = _shape.dim(2);
Window window;
- window.use_tensor_dimensions(tensor.info()->tensor_shape(), Window::DimY);
+ window.use_tensor_dimensions(input_cl->info()->tensor_shape(), Window::DimY);
- Iterator it(&tensor, window);
+ Iterator it(input_cl->handle(), window);
const auto &z = window[Window::DimZ];
const auto &y = window[Window::DimY];
auto feature = _shape.asFeature();
// TODO Fix this workaround (We may need codegen::operand::Object instead of ITensor)
- const util::feature::nchw::View<float> from{&tensor};
+ const util::feature::nchw::View<float> from{input_cl};
util::feature::nhwc::View<float> into{feature, reinterpret_cast<float *>(output_buffer),
output_size};
#include <cassert>
-#include <arm_compute/core/ITensor.h>
#include "kernel/cpu/PermuteLayer.h"
#include "nnfw/std/memory.h"
#include "backend/cpu/operand/Tensor.h"
#include "util/feature/nchw/View.h"
#include "util/feature/nhwc/Reader.h"
#include <util/feature/IndexIterator.h>
+#include "backend/interface/operand/ITensor.h"
+
+// TODO Remove these dependencies to arm_compute lib
+#include <arm_compute/core/Window.h>
+#include <arm_compute/core/Helpers.h>
namespace neurun
{
{
virtual ~ISource() = default;
- virtual void push(::arm_compute::ITensor &tensor) const = 0;
+ virtual void push(::neurun::backend::operand::ITensor &tensor) const = 0;
};
template <typename T> class Source final : public ISource
Source(const T *base, const size_t size) : _base{base}, _size{size} {}
public:
- void push(::arm_compute::ITensor &tensor) const override
+ void push(::neurun::backend::operand::ITensor &tensor) const override
{
memcpy(tensor.buffer(), _base, _size);
}
}
public:
- void push(::arm_compute::ITensor &tensor) const override
+ void push(neurun::backend::operand::ITensor &tensor) const override
{
// do NHWC_TO_NCHW permutation
auto input_buffer = _input.buffer();
- auto input_size = _input.info()->total_size();
+ auto input_size = _input.total_size();
auto output_buffer = tensor.buffer();
auto rank = _shape.rank();
+
+ auto output_cl = dynamic_cast<::neurun::backend::acl_cl::operand::ICLTensor *>(&tensor);
switch (rank)
{
case 0:
auto matrix_shape = _shape.asMatrix();
Window window;
- window.use_tensor_dimensions(tensor.info()->tensor_shape(), Window::DimY);
+ window.use_tensor_dimensions(output_cl->info()->tensor_shape(), Window::DimY);
- Iterator it(&tensor, window);
+ Iterator it(output_cl->handle(), window);
const auto &y = window[Window::DimY];
for (auto h = y.start(); h < y.end(); h += y.step(), it.increment(Window::DimY))
const int32_t width = _shape.dim(2);
Window window;
- window.use_tensor_dimensions(tensor.info()->tensor_shape(), Window::DimY);
+ window.use_tensor_dimensions(output_cl->info()->tensor_shape(), Window::DimY);
- Iterator it(&tensor, window);
+ Iterator it(output_cl->handle(), window);
const auto &z = window[Window::DimZ];
const auto &y = window[Window::DimY];
const util::feature::nhwc::Reader<float> from{
feature, reinterpret_cast<const float *>(input_buffer), input_size};
- util::feature::nchw::View<float> into{&tensor};
+ util::feature::nchw::View<float> into{output_cl};
// TODO Fix this workaround (We may need codegen::operand::Object instead of ITensor)
::nnfw::util::feature::iterate(feature)
#include "backend/BackendManager.h"
#include "backend/interface/IConfig.h"
#include "compiler/BackendResolver.h"
+#include "compiler/TensorInfo.h"
+#include "backend/interface/operand/ITensor.h"
inline void source(ANeuralNetworksExecution *execution,
const ::neurun::graph::operand::DataType &type, int32_t index,
if (input_layout == neurun::graph::operand::Layout::NHWC &&
output_layout == neurun::graph::operand::Layout::NCHW)
{
- const auto tensor_info = ::internal::asTensorInfo(operand->shape(), operand->typeInfo());
+ const auto tensor_info = neurun::compiler::TensorInfo(operand->shape(), operand->typeInfo());
auto tensor_from_interp = neurun::backend::cpu::operand::Tensor(tensor_info);
tensor_from_interp.setBuffer((uint8_t *)buffer);
if (input_layout == neurun::graph::operand::Layout::NCHW &&
output_layout == neurun::graph::operand::Layout::NHWC)
{
- const auto tensor_info = ::internal::asTensorInfo(operand->shape(), operand->typeInfo());
+ const auto tensor_info = neurun::compiler::TensorInfo(operand->shape(), operand->typeInfo());
auto tensor_from_interp = neurun::backend::cpu::operand::Tensor(tensor_info);
tensor_from_interp.setBuffer((uint8_t *)buffer);
// Set input(s)
for (uint32_t n = 0; n < model.getInputs().size(); ++n)
{
- auto setter = [&](::arm_compute::ITensor &tensor) { execution->source(n).push(tensor); };
+ auto setter = [&](::neurun::backend::operand::ITensor &tensor) {
+ execution->source(n).push(tensor);
+ };
neurun::graph::operand::IO::Index input_index{n};
// Get output(s)
for (uint32_t n = 0; n < model.getOutputs().size(); ++n)
{
- auto getter = [&](::arm_compute::ITensor &tensor) { execution->sink(n).pull(tensor); };
+ auto getter = [&](::neurun::backend::operand::ITensor &tensor) {
+ execution->sink(n).pull(tensor);
+ };
neurun::graph::operand::IO::Index output_index{n};
#include "util/kernel/Shape.h"
#include "util/kernel/Reader.h"
-#include <arm_compute/core/ITensor.h>
+#include "backend/cpu/operand/Tensor.h"
namespace internal
{
template <typename T> class View final : public nnfw::util::kernel::Reader<float>
{
public:
- View(::arm_compute::ITensor *tensor) : _tensor{tensor}
+ View(::neurun::backend::cpu::operand::Tensor *tensor) : _tensor{tensor}
{
- assert(tensor->info()->data_type() == ::arm_compute::DataType::F32);
+ assert(tensor->data_type() == ::neurun::graph::operand::DataType::TENSOR_FLOAT32);
- _shape.N = tensor->info()->dimension(3);
- _shape.C = tensor->info()->dimension(2);
- _shape.H = tensor->info()->dimension(1);
- _shape.W = tensor->info()->dimension(0);
+ _shape.N = tensor->dimension(0);
+ _shape.C = tensor->dimension(3);
+ _shape.H = tensor->dimension(1);
+ _shape.W = tensor->dimension(2);
}
public:
private:
nnfw::util::kernel::Shape _shape;
- ::arm_compute::ITensor *_tensor;
+ ::neurun::backend::cpu::operand::Tensor *_tensor;
};
} // namespace kernel
namespace
{
-bool matchSizeExceptAxis(const ::arm_compute::ICLTensor *t1, const ::arm_compute::ICLTensor *t2,
- uint32_t axis)
+bool matchSizeExceptAxis(const ::neurun::backend::acl_cl::operand::ICLTensor *t1,
+ const ::neurun::backend::acl_cl::operand::ICLTensor *t2, uint32_t axis)
{
- assert(t1->info()->num_dimensions() <= 4);
- assert(t2->info()->num_dimensions() <= 4);
+ assert(t1->num_dimensions() <= 4);
+ assert(t2->num_dimensions() <= 4);
for (uint32_t i = 0; i < 4; i++)
{
if (axis == i)
continue;
- if (t1->info()->dimension(i) != t2->info()->dimension(i))
+ if (t1->dimension(i) != t2->dimension(i))
return false;
}
return true;
for (auto input : _input_allocs)
{
assert(matchSizeExceptAxis(_output_alloc, input, _axis));
- axis_sum += input->info()->dimension(_axis);
+ axis_sum += input->dimension(_axis);
}
- assert(_output_alloc->info()->dimension(_axis) == axis_sum);
+ assert(_output_alloc->dimension(_axis) == axis_sum);
}
VERBOSE(Concat_RUN) << "START Concat" << std::endl;
return true;
}
-void ConcatLayer::configure(const std::vector<::arm_compute::ICLTensor *> &input_allocs,
- int32_t axis, ::arm_compute::ICLTensor *output_alloc)
+void ConcatLayer::configure(
+ const std::vector<::neurun::backend::acl_cl::operand::ICLTensor *> &input_allocs, int32_t axis,
+ ::neurun::backend::acl_cl::operand::ICLTensor *output_alloc)
{
_input_allocs = input_allocs;
_output_alloc = output_alloc;
#include <NeuralNetworks.h>
-#include <arm_compute/core/CL/ICLTensor.h>
#include <arm_compute/runtime/IFunction.h>
#include "graph/operand/DataType.h"
+#include "backend/acl_cl/operand/ICLTensor.h"
using OperandType = neurun::graph::operand::DataType;
ConcatLayer();
public:
- void configure(const std::vector<::arm_compute::ICLTensor *> &input_allocs,
+ void configure(const std::vector<::neurun::backend::acl_cl::operand::ICLTensor *> &input_allocs,
int32_t axis /* NNAPI tensor axis from NHWC order */,
- ::arm_compute::ICLTensor *output_alloc);
+ ::neurun::backend::acl_cl::operand::ICLTensor *output_alloc);
void run();
bool concatenationFloat32();
private:
- std::vector<::arm_compute::ICLTensor *> _input_allocs;
- ::arm_compute::ICLTensor *_output_alloc;
+ std::vector<::neurun::backend::acl_cl::operand::ICLTensor *> _input_allocs;
+ ::neurun::backend::acl_cl::operand::ICLTensor *_output_alloc;
int32_t _axis;
OperandType _input_type;
};
// TODO Remove these dependencies to arm_compute lib
#include <arm_compute/runtime/CL/CLScheduler.h>
-#include <arm_compute/core/CL/ICLTensor.h>
+#include "backend/acl_cl/operand/CLTensor.h"
namespace neurun
{
namespace cpu
{
-void PermuteLayer::configure(::arm_compute::ITensor *input, ::arm_compute::ITensor *output,
+void PermuteLayer::configure(::neurun::backend::operand::ITensor *input,
+ ::neurun::backend::operand::ITensor *output,
const graph::operand::Shape &shape, Type type)
{
_input = input;
void PermuteLayer::run()
{
auto input_buffer = _input->buffer();
- auto input_size = _input->info()->total_size();
+ auto input_size = _input->total_size();
auto output_buffer = _output->buffer();
- auto output_size = _output->info()->total_size();
+ auto output_size = _output->total_size();
auto rank = _shape.rank();
{
// TODO Fix this workaround (We may need backend::operand::IObject instead of ITensor)
auto &queue = ::arm_compute::CLScheduler::get().queue();
- auto _output_cl = dynamic_cast<::arm_compute::ICLTensor *>(_output);
+ auto _output_cl = dynamic_cast<::neurun::backend::acl_cl::operand::ICLTensor *>(_output);
_output_cl->map(queue);
switch (rank)
{
auto matrix_shape = _shape.asMatrix();
Window window;
- window.use_tensor_dimensions(_output->info()->tensor_shape(), Window::DimY);
+ window.use_tensor_dimensions(_output_cl->info()->tensor_shape(), Window::DimY);
- Iterator it(_output, window);
+ Iterator it(_output_cl->handle(), window);
const auto &y = window[Window::DimY];
for (auto h = y.start(); h < y.end(); h += y.step(), it.increment(Window::DimY))
const int32_t width = _shape.dim(2);
Window window;
- window.use_tensor_dimensions(_output->info()->tensor_shape(), Window::DimY);
+ window.use_tensor_dimensions(_output_cl->info()->tensor_shape(), Window::DimY);
- Iterator it(_output, window);
+ Iterator it(_output_cl->handle(), window);
const auto &z = window[Window::DimZ];
const auto &y = window[Window::DimY];
const util::feature::nhwc::Reader<float> from{
feature, reinterpret_cast<const float *>(input_buffer), input_size};
- util::feature::nchw::View<float> into{_output};
+ util::feature::nchw::View<float> into{_output_cl};
::nnfw::util::feature::iterate(feature)
<< [&](uint32_t batch, uint32_t ch, uint32_t row, uint32_t col) {
{
// TODO Fix this workaround (We may need backend::operand::IObject instead of ITensor)
auto &queue = ::arm_compute::CLScheduler::get().queue();
- auto _input_cl = dynamic_cast<::arm_compute::ICLTensor *>(_input);
+ auto _input_cl = dynamic_cast<::neurun::backend::acl_cl::operand::ICLTensor *>(_input);
_input_cl->map(queue);
switch (rank)
{
using ::arm_compute::Iterator;
Window window;
- window.use_tensor_dimensions(_input->info()->tensor_shape(), Window::DimY);
+ window.use_tensor_dimensions(_input_cl->info()->tensor_shape(), Window::DimY);
- Iterator it(_input, window);
+ Iterator it(_input_cl->handle(), window);
int output_width = _shape.asMatrix().W;
const int32_t width = _shape.dim(2);
Window window;
- window.use_tensor_dimensions(_input->info()->tensor_shape(), Window::DimY);
+ window.use_tensor_dimensions(_input_cl->info()->tensor_shape(), Window::DimY);
- Iterator it(_input, window);
+ Iterator it(_input_cl->handle(), window);
const auto &z = window[Window::DimZ];
const auto &y = window[Window::DimY];
{
auto feature = _shape.asFeature();
- const util::feature::nchw::View<float> from{_input};
+ const util::feature::nchw::View<float> from{_input_cl};
util::feature::nhwc::View<float> into{feature, reinterpret_cast<float *>(output_buffer),
output_size};
#include <NeuralNetworks.h>
#include "exec/interface/IFunction.h"
-#include <arm_compute/core/ITensor.h>
#include "util/feature/nhwc/View.h"
#include "OperationUtils.h"
+#include "backend/interface/operand/ITensor.h"
namespace neurun
{
PermuteLayer() = default;
public:
- void configure(::arm_compute::ITensor *input, ::arm_compute::ITensor *output,
- const graph::operand::Shape &shape, Type type);
+ void configure(::neurun::backend::operand::ITensor *input,
+ ::neurun::backend::operand::ITensor *output, const graph::operand::Shape &shape,
+ Type type);
void run();
private:
- ::arm_compute::ITensor *_input;
- ::arm_compute::ITensor *_output;
+ ::neurun::backend::operand::ITensor *_input;
+ ::neurun::backend::operand::ITensor *_output;
graph::operand::Shape _shape;
Type _type;
};
#include "util/feature/Reader.h"
-#include <arm_compute/core/ITensor.h>
+#include "backend/acl_cl/operand/ICLTensor.h"
#include <cassert>
template <typename T> class View final : public nnfw::util::feature::Reader<T>
{
public:
- View(::arm_compute::ITensor *tensor) : _tensor{tensor}
+ View(::neurun::backend::acl_cl::operand::ICLTensor *tensor) : _tensor{tensor}
{
- assert(tensor->info()->data_type() == ::arm_compute::DataType::F32);
+ assert(tensor->data_type() == ::arm_compute::DataType::F32);
// TODO Validate whether tensor is a feature map, or not
- _shape.C = tensor->info()->dimension(2);
- _shape.H = tensor->info()->dimension(1);
- _shape.W = tensor->info()->dimension(0);
+ _shape.C = tensor->dimension(2);
+ _shape.H = tensor->dimension(1);
+ _shape.W = tensor->dimension(0);
}
public:
private:
::nnfw::util::feature::Shape _shape;
- ::arm_compute::ITensor *_tensor;
+ ::neurun::backend::acl_cl::operand::ICLTensor *_tensor;
};
} // namespace nchw