.dp_cfg = &sm8250_dpphy_cfg,
};
-static void qcom_qmp_phy_configure_lane(void __iomem *base,
+static void qcom_qmp_phy_combo_configure_lane(void __iomem *base,
const unsigned int *regs,
const struct qmp_phy_init_tbl tbl[],
int num,
}
}
-static void qcom_qmp_phy_configure(void __iomem *base,
+static void qcom_qmp_phy_combo_configure(void __iomem *base,
const unsigned int *regs,
const struct qmp_phy_init_tbl tbl[],
int num)
{
- qcom_qmp_phy_configure_lane(base, regs, tbl, num, 0xff);
+ qcom_qmp_phy_combo_configure_lane(base, regs, tbl, num, 0xff);
}
-static int qcom_qmp_phy_serdes_init(struct qmp_phy *qphy)
+static int qcom_qmp_phy_combo_serdes_init(struct qmp_phy *qphy)
{
struct qcom_qmp *qmp = qphy->qmp;
const struct qmp_phy_cfg *cfg = qphy->cfg;
int serdes_tbl_num = cfg->serdes_tbl_num;
int ret;
- qcom_qmp_phy_configure(serdes, cfg->regs, serdes_tbl, serdes_tbl_num);
+ qcom_qmp_phy_combo_configure(serdes, cfg->regs, serdes_tbl, serdes_tbl_num);
if (cfg->serdes_tbl_sec)
- qcom_qmp_phy_configure(serdes, cfg->regs, cfg->serdes_tbl_sec,
+ qcom_qmp_phy_combo_configure(serdes, cfg->regs, cfg->serdes_tbl_sec,
cfg->serdes_tbl_num_sec);
if (cfg->type == PHY_TYPE_DP) {
switch (dp_opts->link_rate) {
case 1620:
- qcom_qmp_phy_configure(serdes, cfg->regs,
+ qcom_qmp_phy_combo_configure(serdes, cfg->regs,
cfg->serdes_tbl_rbr,
cfg->serdes_tbl_rbr_num);
break;
case 2700:
- qcom_qmp_phy_configure(serdes, cfg->regs,
+ qcom_qmp_phy_combo_configure(serdes, cfg->regs,
cfg->serdes_tbl_hbr,
cfg->serdes_tbl_hbr_num);
break;
case 5400:
- qcom_qmp_phy_configure(serdes, cfg->regs,
+ qcom_qmp_phy_combo_configure(serdes, cfg->regs,
cfg->serdes_tbl_hbr2,
cfg->serdes_tbl_hbr2_num);
break;
case 8100:
- qcom_qmp_phy_configure(serdes, cfg->regs,
+ qcom_qmp_phy_combo_configure(serdes, cfg->regs,
cfg->serdes_tbl_hbr3,
cfg->serdes_tbl_hbr3_num);
break;
{ 0x1f, 0xff, 0xff, 0xff }
};
-static int qcom_qmp_phy_configure_dp_swing(struct qmp_phy *qphy,
+static int qcom_qmp_phy_combo_configure_dp_swing(struct qmp_phy *qphy,
unsigned int drv_lvl_reg, unsigned int emp_post_reg)
{
const struct phy_configure_opts_dp *dp_opts = &qphy->dp_opts;
const struct phy_configure_opts_dp *dp_opts = &qphy->dp_opts;
u32 bias_en, drvr_en;
- if (qcom_qmp_phy_configure_dp_swing(qphy,
+ if (qcom_qmp_phy_combo_configure_dp_swing(qphy,
QSERDES_V3_TX_TX_DRV_LVL,
QSERDES_V3_TX_TX_EMP_POST1_LVL) < 0)
return;
writel(bias_en, qphy->tx2 + QSERDES_V3_TX_TRANSCEIVER_BIAS_EN);
}
-static bool qcom_qmp_phy_configure_dp_mode(struct qmp_phy *qphy)
+static bool qcom_qmp_phy_combo_configure_dp_mode(struct qmp_phy *qphy)
{
u32 val;
bool reverse = false;
u32 phy_vco_div, status;
unsigned long pixel_freq;
- qcom_qmp_phy_configure_dp_mode(qphy);
+ qcom_qmp_phy_combo_configure_dp_mode(qphy);
writel(0x05, qphy->pcs + QSERDES_V3_DP_PHY_TX0_TX1_LANE_CTL);
writel(0x05, qphy->pcs + QSERDES_V3_DP_PHY_TX2_TX3_LANE_CTL);
writel(0x20, qphy->tx + QSERDES_V4_TX_TX_EMP_POST1_LVL);
writel(0x20, qphy->tx2 + QSERDES_V4_TX_TX_EMP_POST1_LVL);
- qcom_qmp_phy_configure_dp_swing(qphy,
+ qcom_qmp_phy_combo_configure_dp_swing(qphy,
QSERDES_V4_TX_TX_DRV_LVL,
QSERDES_V4_TX_TX_EMP_POST1_LVL);
}
writel(0x0f, qphy->pcs + QSERDES_V4_DP_PHY_CFG_1);
- reverse = qcom_qmp_phy_configure_dp_mode(qphy);
+ reverse = qcom_qmp_phy_combo_configure_dp_mode(qphy);
writel(0x13, qphy->pcs + QSERDES_DP_PHY_AUX_CFG1);
writel(0xa4, qphy->pcs + QSERDES_DP_PHY_AUX_CFG2);
return 0;
}
-static int qcom_qmp_phy_com_init(struct qmp_phy *qphy)
+static int qcom_qmp_phy_combo_com_init(struct qmp_phy *qphy)
{
struct qcom_qmp *qmp = qphy->qmp;
const struct qmp_phy_cfg *cfg = qphy->cfg;
return ret;
}
-static int qcom_qmp_phy_com_exit(struct qmp_phy *qphy)
+static int qcom_qmp_phy_combo_com_exit(struct qmp_phy *qphy)
{
struct qcom_qmp *qmp = qphy->qmp;
const struct qmp_phy_cfg *cfg = qphy->cfg;
return 0;
}
-static int qcom_qmp_phy_init(struct phy *phy)
+static int qcom_qmp_phy_combo_init(struct phy *phy)
{
struct qmp_phy *qphy = phy_get_drvdata(phy);
struct qcom_qmp *qmp = qphy->qmp;
return ret;
}
- ret = qcom_qmp_phy_com_init(qphy);
+ ret = qcom_qmp_phy_combo_com_init(qphy);
if (ret)
return ret;
return 0;
}
-static int qcom_qmp_phy_power_on(struct phy *phy)
+static int qcom_qmp_phy_combo_power_on(struct phy *phy)
{
struct qmp_phy *qphy = phy_get_drvdata(phy);
struct qcom_qmp *qmp = qphy->qmp;
unsigned int mask, val, ready;
int ret;
- qcom_qmp_phy_serdes_init(qphy);
+ qcom_qmp_phy_combo_serdes_init(qphy);
if (cfg->has_lane_rst) {
ret = reset_control_deassert(qphy->lane_rst);
}
/* Tx, Rx, and PCS configurations */
- qcom_qmp_phy_configure_lane(tx, cfg->regs,
+ qcom_qmp_phy_combo_configure_lane(tx, cfg->regs,
cfg->tx_tbl, cfg->tx_tbl_num, 1);
if (cfg->tx_tbl_sec)
- qcom_qmp_phy_configure_lane(tx, cfg->regs, cfg->tx_tbl_sec,
+ qcom_qmp_phy_combo_configure_lane(tx, cfg->regs, cfg->tx_tbl_sec,
cfg->tx_tbl_num_sec, 1);
/* Configuration for other LANE for USB-DP combo PHY */
if (cfg->is_dual_lane_phy) {
- qcom_qmp_phy_configure_lane(qphy->tx2, cfg->regs,
+ qcom_qmp_phy_combo_configure_lane(qphy->tx2, cfg->regs,
cfg->tx_tbl, cfg->tx_tbl_num, 2);
if (cfg->tx_tbl_sec)
- qcom_qmp_phy_configure_lane(qphy->tx2, cfg->regs,
+ qcom_qmp_phy_combo_configure_lane(qphy->tx2, cfg->regs,
cfg->tx_tbl_sec,
cfg->tx_tbl_num_sec, 2);
}
if (cfg->type == PHY_TYPE_DP)
cfg->configure_dp_tx(qphy);
- qcom_qmp_phy_configure_lane(rx, cfg->regs,
+ qcom_qmp_phy_combo_configure_lane(rx, cfg->regs,
cfg->rx_tbl, cfg->rx_tbl_num, 1);
if (cfg->rx_tbl_sec)
- qcom_qmp_phy_configure_lane(rx, cfg->regs,
+ qcom_qmp_phy_combo_configure_lane(rx, cfg->regs,
cfg->rx_tbl_sec, cfg->rx_tbl_num_sec, 1);
if (cfg->is_dual_lane_phy) {
- qcom_qmp_phy_configure_lane(qphy->rx2, cfg->regs,
+ qcom_qmp_phy_combo_configure_lane(qphy->rx2, cfg->regs,
cfg->rx_tbl, cfg->rx_tbl_num, 2);
if (cfg->rx_tbl_sec)
- qcom_qmp_phy_configure_lane(qphy->rx2, cfg->regs,
+ qcom_qmp_phy_combo_configure_lane(qphy->rx2, cfg->regs,
cfg->rx_tbl_sec,
cfg->rx_tbl_num_sec, 2);
}
if (cfg->type == PHY_TYPE_DP) {
cfg->configure_dp_phy(qphy);
} else {
- qcom_qmp_phy_configure(pcs, cfg->regs, cfg->pcs_tbl, cfg->pcs_tbl_num);
+ qcom_qmp_phy_combo_configure(pcs, cfg->regs, cfg->pcs_tbl, cfg->pcs_tbl_num);
if (cfg->pcs_tbl_sec)
- qcom_qmp_phy_configure(pcs, cfg->regs, cfg->pcs_tbl_sec,
+ qcom_qmp_phy_combo_configure(pcs, cfg->regs, cfg->pcs_tbl_sec,
cfg->pcs_tbl_num_sec);
}
if (ret)
goto err_disable_pipe_clk;
- qcom_qmp_phy_configure(pcs_misc, cfg->regs, cfg->pcs_misc_tbl,
+ qcom_qmp_phy_combo_configure(pcs_misc, cfg->regs, cfg->pcs_misc_tbl,
cfg->pcs_misc_tbl_num);
if (cfg->pcs_misc_tbl_sec)
- qcom_qmp_phy_configure(pcs_misc, cfg->regs, cfg->pcs_misc_tbl_sec,
+ qcom_qmp_phy_combo_configure(pcs_misc, cfg->regs, cfg->pcs_misc_tbl_sec,
cfg->pcs_misc_tbl_num_sec);
/*
return ret;
}
-static int qcom_qmp_phy_power_off(struct phy *phy)
+static int qcom_qmp_phy_combo_power_off(struct phy *phy)
{
struct qmp_phy *qphy = phy_get_drvdata(phy);
const struct qmp_phy_cfg *cfg = qphy->cfg;
return 0;
}
-static int qcom_qmp_phy_exit(struct phy *phy)
+static int qcom_qmp_phy_combo_exit(struct phy *phy)
{
struct qmp_phy *qphy = phy_get_drvdata(phy);
const struct qmp_phy_cfg *cfg = qphy->cfg;
if (cfg->has_lane_rst)
reset_control_assert(qphy->lane_rst);
- qcom_qmp_phy_com_exit(qphy);
+ qcom_qmp_phy_combo_com_exit(qphy);
return 0;
}
-static int qcom_qmp_phy_enable(struct phy *phy)
+static int qcom_qmp_phy_combo_enable(struct phy *phy)
{
int ret;
- ret = qcom_qmp_phy_init(phy);
+ ret = qcom_qmp_phy_combo_init(phy);
if (ret)
return ret;
- ret = qcom_qmp_phy_power_on(phy);
+ ret = qcom_qmp_phy_combo_power_on(phy);
if (ret)
- qcom_qmp_phy_exit(phy);
+ qcom_qmp_phy_combo_exit(phy);
return ret;
}
-static int qcom_qmp_phy_disable(struct phy *phy)
+static int qcom_qmp_phy_combo_disable(struct phy *phy)
{
int ret;
- ret = qcom_qmp_phy_power_off(phy);
+ ret = qcom_qmp_phy_combo_power_off(phy);
if (ret)
return ret;
- return qcom_qmp_phy_exit(phy);
+ return qcom_qmp_phy_combo_exit(phy);
}
-static int qcom_qmp_phy_set_mode(struct phy *phy,
+static int qcom_qmp_phy_combo_set_mode(struct phy *phy,
enum phy_mode mode, int submode)
{
struct qmp_phy *qphy = phy_get_drvdata(phy);
return 0;
}
-static void qcom_qmp_phy_enable_autonomous_mode(struct qmp_phy *qphy)
+static void qcom_qmp_phy_combo_enable_autonomous_mode(struct qmp_phy *qphy)
{
const struct qmp_phy_cfg *cfg = qphy->cfg;
void __iomem *pcs = qphy->pcs;
qphy_clrbits(pcs_misc, QPHY_V3_PCS_MISC_CLAMP_ENABLE, CLAMP_EN);
}
-static void qcom_qmp_phy_disable_autonomous_mode(struct qmp_phy *qphy)
+static void qcom_qmp_phy_combo_disable_autonomous_mode(struct qmp_phy *qphy)
{
const struct qmp_phy_cfg *cfg = qphy->cfg;
void __iomem *pcs = qphy->pcs;
qphy_clrbits(pcs, cfg->regs[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR], IRQ_CLEAR);
}
-static int __maybe_unused qcom_qmp_phy_runtime_suspend(struct device *dev)
+static int __maybe_unused qcom_qmp_phy_combo_runtime_suspend(struct device *dev)
{
struct qcom_qmp *qmp = dev_get_drvdata(dev);
struct qmp_phy *qphy = qmp->phys[0];
return 0;
}
- qcom_qmp_phy_enable_autonomous_mode(qphy);
+ qcom_qmp_phy_combo_enable_autonomous_mode(qphy);
clk_disable_unprepare(qphy->pipe_clk);
clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks);
return 0;
}
-static int __maybe_unused qcom_qmp_phy_runtime_resume(struct device *dev)
+static int __maybe_unused qcom_qmp_phy_combo_runtime_resume(struct device *dev)
{
struct qcom_qmp *qmp = dev_get_drvdata(dev);
struct qmp_phy *qphy = qmp->phys[0];
return ret;
}
- qcom_qmp_phy_disable_autonomous_mode(qphy);
+ qcom_qmp_phy_combo_disable_autonomous_mode(qphy);
return 0;
}
-static int qcom_qmp_phy_vreg_init(struct device *dev, const struct qmp_phy_cfg *cfg)
+static int qcom_qmp_phy_combo_vreg_init(struct device *dev, const struct qmp_phy_cfg *cfg)
{
struct qcom_qmp *qmp = dev_get_drvdata(dev);
int num = cfg->num_vregs;
return devm_regulator_bulk_get(dev, num, qmp->vregs);
}
-static int qcom_qmp_phy_reset_init(struct device *dev, const struct qmp_phy_cfg *cfg)
+static int qcom_qmp_phy_combo_reset_init(struct device *dev, const struct qmp_phy_cfg *cfg)
{
struct qcom_qmp *qmp = dev_get_drvdata(dev);
int i;
return 0;
}
-static int qcom_qmp_phy_clk_init(struct device *dev, const struct qmp_phy_cfg *cfg)
+static int qcom_qmp_phy_combo_clk_init(struct device *dev, const struct qmp_phy_cfg *cfg)
{
struct qcom_qmp *qmp = dev_get_drvdata(dev);
int num = cfg->num_clks;
return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, np);
}
-static const struct phy_ops qcom_qmp_phy_gen_ops = {
- .init = qcom_qmp_phy_enable,
- .exit = qcom_qmp_phy_disable,
- .set_mode = qcom_qmp_phy_set_mode,
+static const struct phy_ops qcom_qmp_phy_combo_gen_ops = {
+ .init = qcom_qmp_phy_combo_enable,
+ .exit = qcom_qmp_phy_combo_disable,
+ .set_mode = qcom_qmp_phy_combo_set_mode,
.owner = THIS_MODULE,
};
-static const struct phy_ops qcom_qmp_phy_dp_ops = {
- .init = qcom_qmp_phy_init,
+static const struct phy_ops qcom_qmp_phy_combo_dp_ops = {
+ .init = qcom_qmp_phy_combo_init,
.configure = qcom_qmp_dp_phy_configure,
- .power_on = qcom_qmp_phy_power_on,
+ .power_on = qcom_qmp_phy_combo_power_on,
.calibrate = qcom_qmp_dp_phy_calibrate,
- .power_off = qcom_qmp_phy_power_off,
- .exit = qcom_qmp_phy_exit,
- .set_mode = qcom_qmp_phy_set_mode,
+ .power_off = qcom_qmp_phy_combo_power_off,
+ .exit = qcom_qmp_phy_combo_exit,
+ .set_mode = qcom_qmp_phy_combo_set_mode,
.owner = THIS_MODULE,
};
static const struct phy_ops qcom_qmp_pcie_ufs_ops = {
- .power_on = qcom_qmp_phy_enable,
- .power_off = qcom_qmp_phy_disable,
- .set_mode = qcom_qmp_phy_set_mode,
+ .power_on = qcom_qmp_phy_combo_enable,
+ .power_off = qcom_qmp_phy_combo_disable,
+ .set_mode = qcom_qmp_phy_combo_set_mode,
.owner = THIS_MODULE,
};
}
static
-int qcom_qmp_phy_create(struct device *dev, struct device_node *np, int id,
+int qcom_qmp_phy_combo_create(struct device *dev, struct device_node *np, int id,
void __iomem *serdes, const struct qmp_phy_cfg *cfg)
{
struct qcom_qmp *qmp = dev_get_drvdata(dev);
if (cfg->type == PHY_TYPE_UFS || cfg->type == PHY_TYPE_PCIE)
ops = &qcom_qmp_pcie_ufs_ops;
else if (cfg->type == PHY_TYPE_DP)
- ops = &qcom_qmp_phy_dp_ops;
+ ops = &qcom_qmp_phy_combo_dp_ops;
else
- ops = &qcom_qmp_phy_gen_ops;
+ ops = &qcom_qmp_phy_combo_gen_ops;
generic_phy = devm_phy_create(dev, np, ops);
if (IS_ERR(generic_phy)) {
};
MODULE_DEVICE_TABLE(of, qcom_qmp_combo_phy_of_match_table);
-static const struct dev_pm_ops qcom_qmp_phy_pm_ops = {
- SET_RUNTIME_PM_OPS(qcom_qmp_phy_runtime_suspend,
- qcom_qmp_phy_runtime_resume, NULL)
+static const struct dev_pm_ops qcom_qmp_phy_combo_pm_ops = {
+ SET_RUNTIME_PM_OPS(qcom_qmp_phy_combo_runtime_suspend,
+ qcom_qmp_phy_combo_runtime_resume, NULL)
};
-static int qcom_qmp_phy_probe(struct platform_device *pdev)
+static int qcom_qmp_phy_combo_probe(struct platform_device *pdev)
{
struct qcom_qmp *qmp;
struct device *dev = &pdev->dev;
mutex_init(&qmp->phy_mutex);
- ret = qcom_qmp_phy_clk_init(dev, cfg);
+ ret = qcom_qmp_phy_combo_clk_init(dev, cfg);
if (ret)
return ret;
- ret = qcom_qmp_phy_reset_init(dev, cfg);
+ ret = qcom_qmp_phy_combo_reset_init(dev, cfg);
if (ret)
return ret;
- ret = qcom_qmp_phy_vreg_init(dev, cfg);
+ ret = qcom_qmp_phy_combo_vreg_init(dev, cfg);
if (ret) {
if (ret != -EPROBE_DEFER)
dev_err(dev, "failed to get regulator supplies: %d\n",
}
/* Create per-lane phy */
- ret = qcom_qmp_phy_create(dev, child, id, serdes, cfg);
+ ret = qcom_qmp_phy_combo_create(dev, child, id, serdes, cfg);
if (ret) {
dev_err(dev, "failed to create lane%d phy, %d\n",
id, ret);
return ret;
}
-static struct platform_driver qcom_qmp_phy_driver = {
- .probe = qcom_qmp_phy_probe,
+static struct platform_driver qcom_qmp_phy_combo_driver = {
+ .probe = qcom_qmp_phy_combo_probe,
.driver = {
.name = "qcom-qmp-combo-phy",
- .pm = &qcom_qmp_phy_pm_ops,
+ .pm = &qcom_qmp_phy_combo_pm_ops,
.of_match_table = qcom_qmp_combo_phy_of_match_table,
},
};
-module_platform_driver(qcom_qmp_phy_driver);
+module_platform_driver(qcom_qmp_phy_combo_driver);
MODULE_AUTHOR("Vivek Gautam <vivek.gautam@codeaurora.org>");
MODULE_DESCRIPTION("Qualcomm QMP USB+DP combo PHY driver");