And mark it as legal.
llvm-svn: 278802
for (unsigned OpI = 0, OpE = I.getNumExplicitOperands(); OpI != OpE; ++OpI) {
MachineOperand &MO = I.getOperand(OpI);
- // There's nothing to be done on immediates.
- if (MO.isImm())
+ // There's nothing to be done on immediates and frame indexes.
+ if (MO.isImm() || MO.isFI())
continue;
DEBUG(dbgs() << "Converting operand: " << MO << '\n');
return true;
}
+ case TargetOpcode::G_FRAME_INDEX: {
+ // allocas and G_FRAME_INDEX are only supported in addrspace(0).
+ if (I.getType() != LLT::pointer(0)) {
+ DEBUG(dbgs() << "G_FRAME_INDEX pointer has type: " << I.getType()
+ << ", expected: " << LLT::pointer(0) << '\n');
+ return false;
+ }
+
+ I.setDesc(TII.get(AArch64::ADDXri));
+ I.removeTypes();
+
+ // MOs for a #0 shifted immediate.
+ I.addOperand(MachineOperand::CreateImm(0));
+ I.addOperand(MachineOperand::CreateImm(0));
+
+ return constrainSelectedInstRegOperands(I, TII, TRI, RBI);
+ }
+
case TargetOpcode::G_LOAD:
case TargetOpcode::G_STORE: {
LLT MemTy = I.getType(0);
setAction(G_BR, LLT::unsized(), Legal);
+ setAction(G_FRAME_INDEX, LLT::pointer(0), Legal);
+
computeTables();
}
define void @store_s64_gpr(i64* %addr) { ret void }
define void @store_s32_gpr(i32* %addr) { ret void }
+ define void @frame_index() {
+ %ptr0 = alloca i64
+ ret void
+ }
+
define void @selected_property() { ret void }
...
...
---
+# CHECK-LABEL: name: frame_index
+name: frame_index
+isSSA: true
+legalized: true
+regBankSelected: true
+
+# CHECK: registers:
+# CHECK-NEXT: - { id: 0, class: gpr64sp }
+registers:
+ - { id: 0, class: gpr }
+
+stack:
+ - { id: 0, name: ptr0, offset: 0, size: 8, alignment: 8 }
+
+# CHECK: body:
+# CHECK: %0 = ADDXri %stack.0.ptr0, 0, 0
+body: |
+ bb.0:
+ %0(64) = G_FRAME_INDEX p0 %stack.0.ptr0
+...
+
+---
# Check that we set the "selected" property.
# CHECK-LABEL: name: selected_property
# CHECK: legalized: true