aliases {
serial0 = &uart_AO;
+ serial1 = &uart_A;
+ serial2 = &uart_B;
+ serial3 = &uart_C;
+ serial4 = &uart_AO_B;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
};
};
+&dwc3 {
+ status = "okay";
+};
+
+&usb2_phy_v2 {
+ status = "okay";
+ portnum = <2>;
+};
+
+&usb3_phy_v2 {
+ status = "okay";
+ portnum = <0>;
+ otg = <1>;
+ gpio-vbus-power = "GPIOH_6";
+ gpios = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;
+};
+
+&dwc2_a {
+ status = "okay";
+ /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
+ controller-type = <3>;
+};
+ðmac {
+ status = "okay";
+ pinctrl-names = "internal_eth_pins";
+ pinctrl-0 = <&internal_eth_pins>;
+ mc_val = <0x4be04>;
+
+ internal_phy=<1>;
+};
+
+&uart_A {
+ status = "okay";
+};
+
+&pcie_A {
+ reset-gpio = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
pll-setting-1 = <0x09400414>;
pll-setting-2 = <0x927E0000>;
pll-setting-3 = <0xac5f49e5>;
+ pll-setting-4 = <0xfe18>;
+ pll-setting-5 = <0xfff>;
+ pll-setting-6 = <0xc8000>;
+ pll-setting-7 = <0xe0004>;
+ pll-setting-8 = <0xe000c>;
};
usb3_phy_v2: usb3phy@ffe09080 {
status = "disabled";
reg = <0x0 0xffe09080 0x0 0x20>;
phy-reg = <0xff646000>;
- phy-reg-size = <0x4>;
+ phy-reg-size = <0x2000>;
usb2-phy-reg = <0xffe09000>;
usb2-phy-reg-size = <0x80>;
interrupts = <0 16 4>;
xtal_tick_en = <1>;
fifosize = < 64 >;
pinctrl-names = "default";
- pinctrl-0 = <&ao_uart_pins>;
+ /*pinctrl-0 = <&ao_uart_pins>;*/
support-sysrq = <0>; /* 0 not support*/
};