vdin: add vdin output color depth selection from dts
authorxuhua zhang <xuhua.zhang@amlogic.com>
Fri, 27 Jul 2018 09:09:48 +0000 (17:09 +0800)
committerYixun Lan <yixun.lan@amlogic.com>
Fri, 3 Aug 2018 10:05:03 +0000 (03:05 -0700)
PD#170749: vdin: add vdin output color depth selection

when vdin receive 4K && 50/60hz && 10bit data,
we can select vdin output color depth 8bit or 10bit from dts

Change-Id: I9c030b4769927dbf53880fad6c80707d7b282e86
Signed-off-by: xuhua zhang <xuhua.zhang@amlogic.com>
arch/arm64/boot/dts/amlogic/txl_t950_p341.dts
arch/arm64/boot/dts/amlogic/txl_t960_p346.dts
arch/arm64/boot/dts/amlogic/txl_t962_p320.dts
arch/arm64/boot/dts/amlogic/txl_t962_p321.dts
arch/arm64/boot/dts/amlogic/txlx_t962e_r321.dts
arch/arm64/boot/dts/amlogic/txlx_t962x_r311_1g.dts
arch/arm64/boot/dts/amlogic/txlx_t962x_r311_2g.dts
arch/arm64/boot/dts/amlogic/txlx_t962x_r311_720p.dts
drivers/amlogic/media/vin/tvin/vdin/vdin_ctl.c
drivers/amlogic/media/vin/tvin/vdin/vdin_drv.c
drivers/amlogic/media/vin/tvin/vdin/vdin_drv.h

index 7e3b1d9..1cedbe6 100644 (file)
                 * bit2:support 10bit
                 * bit3:support 12bit
                 * bit4:support yuv422 10bit full pack mode (from txl new add)
+                * bit8:use 8bit  at 4k_50/60hz_10bit
+                * bit9:use 10bit at 4k_50/60hz_10bit
                 */
-               tv_bit_mode = <21>;
+               tv_bit_mode = <0x215>;
        };
 
        vdin@1 {
index 36103e7..c70c0be 100644 (file)
                 * bit2:support 10bit
                 * bit3:support 12bit
                 * bit4:support yuv422 10bit full pack mode (from txl new add)
+                * bit8:use 8bit  at 4k_50/60hz_10bit
+                * bit9:use 10bit at 4k_50/60hz_10bit
                 */
-               tv_bit_mode = <21>;
+               tv_bit_mode = <0x215>;
        };
 
        vdin@1 {
index de7e529..0129400 100644 (file)
                 * bit2:support 10bit
                 * bit3:support 12bit
                 * bit4:support yuv422 10bit full pack mode (from txl new add)
+                * bit8:use 8bit  at 4k_50/60hz_10bit
+                * bit9:use 10bit at 4k_50/60hz_10bit
                 */
-               tv_bit_mode = <21>;
+               tv_bit_mode = <0x215>;
        };
 
        vdin@1 {
index 63cf3bd..9527482 100644 (file)
                 * bit2:support 10bit
                 * bit3:support 12bit
                 * bit4:support yuv422 10bit full pack mode (from txl new add)
+                * bit8:use 8bit  at 4k_50/60hz_10bit
+                * bit9:use 10bit at 4k_50/60hz_10bit
                 */
-               tv_bit_mode = <21>;
+               tv_bit_mode = <0x215>;
        };
 
        vdin@1 {
index d1d8f02..af1c984 100644 (file)
                 * bit2:support 10bit
                 * bit3:support 12bit
                 * bit4:support yuv422 10bit full pack mode (from txl new add)
+                * bit8:use 8bit  at 4k_50/60hz_10bit
+                * bit9:use 10bit at 4k_50/60hz_10bit
                 */
-               tv_bit_mode = <21>;
+               tv_bit_mode = <0x215>;
        };
 
        vdin1 {
index 690f140..374c7ee 100644 (file)
                 * bit2:support 10bit
                 * bit3:support 12bit
                 * bit4:support yuv422 10bit full pack mode (from txl new add)
+                * bit8:use 8bit  at 4k_50/60hz_10bit
+                * bit9:use 10bit at 4k_50/60hz_10bit
                 */
-               tv_bit_mode = <21>;
+               tv_bit_mode = <0x215>;
        };
 
        vdin1 {
index cd69f48..4bdef1a 100644 (file)
                 * bit2:support 10bit
                 * bit3:support 12bit
                 * bit4:support yuv422 10bit full pack mode (from txl new add)
+                * bit8:use 8bit  at 4k_50/60hz_10bit
+                * bit9:use 10bit at 4k_50/60hz_10bit
                 */
-               tv_bit_mode = <21>;
+               tv_bit_mode = <0x215>;
        };
 
        vdin1 {
index 08ad64e..44ab240 100644 (file)
                clocks = <&clkc CLKID_FCLK_DIV5>,
                        <&clkc CLKID_VDIN_MEAS_COMP>;
                clock-names = "fclk_div5", "cts_vdin_meas_clk";
-               vdin_id = <0>;
                /* vdin write mem color depth support:
                 * bit0:support 8bit
                 * bit1:support 9bit
                 * bit2:support 10bit
                 * bit3:support 12bit
                 * bit4:support yuv422 10bit full pack mode (from txl new add)
+                * bit8:use 8bit  at 4k_50/60hz_10bit
+                * bit9:use 10bit at 4k_50/60hz_10bit
                 */
-               tv_bit_mode = <21>;
+               tv_bit_mode = <0x215>;
        };
 
        vdin1 {
index d87a2b6..1b8e330 100644 (file)
@@ -3291,6 +3291,7 @@ void vdin_set_hvscale(struct vdin_dev_s *devp)
        if (vdin_ctl_dbg)
                pr_info(" dst vactive:%u.\n", devp->v_active);
 }
+
 /*set source_bitdepth
  *     base on color_depth_config:
  *             10, 8, 0, other
@@ -3298,6 +3299,17 @@ void vdin_set_hvscale(struct vdin_dev_s *devp)
 void vdin_set_bitdepth(struct vdin_dev_s *devp)
 {
        unsigned int offset = devp->addr_offset;
+       unsigned int set_width = 0;
+
+       if ((devp->output_color_depth) &&
+               ((devp->prop.fps == 50) || (devp->prop.fps == 60)) &&
+               ((devp->parm.info.fmt == TVIN_SIG_FMT_HDMI_3840_2160_00HZ) ||
+               (devp->parm.info.fmt == TVIN_SIG_FMT_HDMI_4096_2160_00HZ)) &&
+               (devp->prop.colordepth == 10)) {
+               set_width = devp->output_color_depth;
+               pr_info("set output color depth %d bit from dts\n", set_width);
+       }
+
        switch (devp->color_depth_config) {
        case 8:
                devp->source_bitdepth = 8;
@@ -3314,27 +3326,33 @@ void vdin_set_bitdepth(struct vdin_dev_s *devp)
                devp->source_bitdepth is controlled by colordepth
                change default to 10bit for 8in8out detail maybe lost
                 */
-               if (((devp->prop.color_format == TVIN_RGB444) ||
+               if ((devp->prop.color_format == TVIN_RGB444) ||
                        (devp->prop.color_format == TVIN_YUV444) ||
                        (devp->prop.color_format == TVIN_BGGR) ||
                        (devp->prop.color_format == TVIN_RGGB) ||
                        (devp->prop.color_format == TVIN_GBRG) ||
-                       (devp->prop.color_format == TVIN_GRBG)) &&
-                       ((devp->prop.colordepth <= 8) ||
-                       is_meson_txlx_cpu())) {
-                       /*txlx dmc is diff & bandwidth tension*/
+                       (devp->prop.color_format == TVIN_GRBG)) {
+                       devp->source_bitdepth = 8;
+                       wr_bits(offset, VDIN_WR_CTRL2, 0,
+                               VDIN_WR_10BIT_MODE_BIT, VDIN_WR_10BIT_MODE_WID);
+               } else if (devp->prop.colordepth == 8) {
                        devp->source_bitdepth = 8;
                        wr_bits(offset, VDIN_WR_CTRL2, 0,
                                VDIN_WR_10BIT_MODE_BIT, VDIN_WR_10BIT_MODE_WID);
                } else if ((devp->color_depth_support &
                        VDIN_WR_COLOR_DEPTH_10BIT) &&
-                       (devp->dv.dv_flag == false) &&
-                       ((devp->dv.dolby_input &
-                               (1 << devp->index)) == false) &&
-                       (is_dolby_vision_enable() == false)) {
-                       devp->source_bitdepth = 10;
-                       wr_bits(offset, VDIN_WR_CTRL2, 1,
-                               VDIN_WR_10BIT_MODE_BIT, VDIN_WR_10BIT_MODE_WID);
+                       (devp->prop.colordepth == 10)) {
+                       if (set_width == 8) {
+                               devp->source_bitdepth = 8;
+                               wr_bits(offset, VDIN_WR_CTRL2, 0,
+                                       VDIN_WR_10BIT_MODE_BIT,
+                                       VDIN_WR_10BIT_MODE_WID);
+                       } else {
+                               devp->source_bitdepth = 10;
+                               wr_bits(offset, VDIN_WR_CTRL2, 1,
+                                       VDIN_WR_10BIT_MODE_BIT,
+                                       VDIN_WR_10BIT_MODE_WID);
+                       }
                } else {
                        devp->source_bitdepth = 8;
                        wr_bits(offset, VDIN_WR_CTRL2, 0,
index ed5c768..64ff21e 100644 (file)
@@ -2444,9 +2444,17 @@ static int vdin_drv_probe(struct platform_device *pdev)
        if (ret)
                pr_info("no bit mode found, set 8bit as default\n");
 
-       vdevp->color_depth_support = bit_mode;
+       vdevp->color_depth_support = bit_mode & 0xff;
        vdevp->color_depth_config = 0;
 
+       ret = (bit_mode >> 8) & 0xff;
+       if (ret == 0)
+               vdevp->output_color_depth = 0;
+       else if (ret == 1)
+               vdevp->output_color_depth = 8;
+       else if (ret == 2)
+               vdevp->output_color_depth = 10;
+
        if (vdevp->color_depth_support&VDIN_WR_COLOR_DEPTH_10BIT_FULL_PCAK_MODE)
                vdevp->color_depth_mode = 1;
        else
index 1ead28d..4438f8d 100644 (file)
@@ -272,6 +272,11 @@ struct vdin_dev_s {
         *0: config 10bit as 12bit
         */
        unsigned int color_depth_mode;
+       /* output_color_depth:
+        * when tv_input is 4k50hz_10bit or 4k60hz_10bit,
+        * choose output color depth from dts
+        */
+       unsigned int output_color_depth;
        /* cutwindow config */
        bool cutwindow_cfg;
        bool auto_cutwindow_en;