ArchKind parseArch(StringRef Arch);
unsigned parseArchExt(StringRef ArchExt);
ArchKind parseCPUArch(StringRef CPU);
+void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
ISAKind parseArchISA(StringRef Arch);
EndianKind parseArchEndian(StringRef Arch);
ProfileKind parseArchProfile(StringRef Arch);
AArch64::ArchKind parseArch(StringRef Arch);
ArchExtKind parseArchExt(StringRef ArchExt);
ArchKind parseCPUArch(StringRef CPU);
+void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
ARM::ISAKind parseArchISA(StringRef Arch);
ARM::EndianKind parseArchEndian(StringRef Arch);
ARM::ProfileKind parseArchProfile(StringRef Arch);
return ARM::ArchKind::INVALID;
}
+void llvm::ARM::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) {
+ for (const CpuNames<ARM::ArchKind> &Arch : CPUNames) {
+ if (Arch.ArchID != ARM::ArchKind::INVALID)
+ Values.push_back(Arch.getName());
+ }
+}
+
+void llvm::AArch64::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) {
+ for (const CpuNames<AArch64::ArchKind> &Arch : AArch64CPUNames) {
+ if (Arch.ArchID != AArch64::ArchKind::INVALID)
+ Values.push_back(Arch.getName());
+ }
+}
+
// ARM, Thumb, AArch64
ARM::ISAKind ARM::parseArchISA(StringRef Arch) {
return StringSwitch<ARM::ISAKind>(Arch)
"7-S"));
}
+static constexpr int NumARMCPUArchs = 82;
+
+TEST(TargetParserTest, testARMCPUArchList) {
+ SmallVector<StringRef, NumARMCPUArchs> List;
+ ARM::fillValidCPUArchList(List);
+
+ // No list exists for these in this test suite, so ensure all are
+ // valid, and match the expected 'magic' count.
+ EXPECT_EQ(List.size(), NumARMCPUArchs);
+ for(StringRef CPU : List) {
+ EXPECT_NE(ARM::parseCPUArch(CPU), ARM::ArchKind::INVALID);
+ }
+}
+
TEST(TargetParserTest, testInvalidARMArch) {
auto InvalidArchStrings = {"armv", "armv99", "noarm"};
for (const char* InvalidArch : InvalidArchStrings)
"8-A"));
}
+static constexpr int NumAArch64CPUArchs = 19;
+
+TEST(TargetParserTest, testAArch64CPUArchList) {
+ SmallVector<StringRef, NumAArch64CPUArchs> List;
+ AArch64::fillValidCPUArchList(List);
+
+ // No list exists for these in this test suite, so ensure all are
+ // valid, and match the expected 'magic' count.
+ EXPECT_EQ(List.size(), NumAArch64CPUArchs);
+ for(StringRef CPU : List) {
+ EXPECT_NE(AArch64::parseCPUArch(CPU), AArch64::ArchKind::INVALID);
+ }
+}
+
bool testAArch64Arch(StringRef Arch, StringRef DefaultCPU, StringRef SubArch,
unsigned ArchAttr) {
AArch64::ArchKind AK = AArch64::parseArch(Arch);