board: axs10x - support v3 mother-board
authorAlexey Brodkin <abrodkin@synopsys.com>
Thu, 9 Apr 2015 16:50:58 +0000 (19:50 +0300)
committerAlexey Brodkin <abrodkin@synopsys.com>
Thu, 9 Apr 2015 17:00:46 +0000 (20:00 +0300)
There're 2 versions of motherboards that could be used in ARC SDP.
The only important difference for U-Boot is different NAND IC in use:
 [1] v2 board (we used to support up until now) sports MT29F4G08ABADAWP
while
 [2] v3 board sports MT29F4G16ABADAWP

They are almost the same except data bus width 8-bit in [1] and 16-bit
in [2]. And for proper support of 16-bit data bus we have to pass
NAND_BUSWIDTH_16 option to NAND driver core - which we do now knowing
board type we're running on.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
board/synopsys/axs101/axs101.c
board/synopsys/axs101/axs10x.h [new file with mode: 0644]
board/synopsys/axs101/nand.c
include/configs/axs101.h

index 7742049..8c16410 100644 (file)
@@ -9,6 +9,7 @@
 #include <malloc.h>
 #include <netdev.h>
 #include <phy.h>
+#include "axs10x.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -42,3 +43,16 @@ int board_eth_init(bd_t *bis)
 
        return 0;
 }
+
+
+#define AXS_MB_CREG    0xE0011000
+
+int board_early_init_f(void)
+{
+       if (readl((void __iomem *)AXS_MB_CREG + 0x234) & (1 << 28))
+               gd->board_type = AXS_MB_V3;
+       else
+               gd->board_type = AXS_MB_V2;
+
+       return 0;
+}
diff --git a/board/synopsys/axs101/axs10x.h b/board/synopsys/axs101/axs10x.h
new file mode 100644 (file)
index 0000000..8e8c41f
--- /dev/null
@@ -0,0 +1,16 @@
+/*
+ * Copyright (C) 2015 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef _BOARD_SYNOPSYS_AXS10X_H
+#define _BOARD_SYNOPSYS_AXS10X_H
+
+enum {
+       AXS_MB_V2,
+       AXS_MB_V3
+};
+
+#endif /* _BOARD_SYNOPSYS_AXS10X_H */
+
index ff35286..4be52e2 100644 (file)
@@ -9,6 +9,9 @@
 #include <malloc.h>
 #include <nand.h>
 #include <asm/io.h>
+#include "axs10x.h"
+
+DECLARE_GLOBAL_DATA_PTR;
 
 #define BUS_WIDTH      8               /* AXI data bus width in bytes  */
 
@@ -232,5 +235,9 @@ int board_nand_init(struct nand_chip *nand)
        nand->write_buf = axs101_nand_write_buf;
        nand->read_buf = axs101_nand_read_buf;
 
+       /* MBv3 has NAND IC with 16-bit data bus */
+       if (gd->board_type == AXS_MB_V3)
+               nand->options |= NAND_BUSWIDTH_16;
+
        return 0;
 }
index 5fb8aca..8a7095c 100644 (file)
 #define CONFIG_SYS_LOAD_ADDR           0x82000000
 
 /*
+ * This board might be of different versions so handle it
+ */
+#define CONFIG_BOARD_TYPES
+#define CONFIG_BOARD_EARLY_INIT_F
+
+/*
  * NAND Flash configuration
  */
 #define CONFIG_SYS_NO_FLASH