drm/amdkfd: PM4 packets change to support GWS

Add a field in map_queues packet to indicate whether
this is a gws control queue. Only one queue per process
can be gws control queue. Change num_gws field in
map_process packet to 7 bits

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c
index 3dd731c69b5d1d47896bf38bee152faea97c5100..07f02f8e4fe4ed9f6b7f973d625a5f961f7dcef9 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c
@@ -159,6 +159,7 @@ static int pm_map_queues_v9(struct packet_manager *pm, uint32_t *buffer,
 
        packet->bitfields2.engine_sel =
                engine_sel__mes_map_queues__compute_vi;
+       packet->bitfields2.gws_control_queue = q->gws ? 1 : 0;
        packet->bitfields2.queue_type =
                queue_type__mes_map_queues__normal_compute_vi;
 

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h b/drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h
index 0661339071f071262ba717527dfd37c93bd2f924..49ab66b703faf30846f8c3096a25745bb496b7b1 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h
@@ -176,8 +176,7 @@ struct pm4_mes_map_process {
 
        union {
                struct {
-                       uint32_t num_gws:6;
-                       uint32_t reserved7:1;
+                       uint32_t num_gws:7;
                        uint32_t sdma_enable:1;
                        uint32_t num_oac:4;
                        uint32_t reserved8:4;
@@ -272,7 +271,9 @@ struct pm4_mes_map_queues {
                struct {
                        uint32_t reserved1:4;
                        enum mes_map_queues_queue_sel_enum queue_sel:2;
-                       uint32_t reserved2:15;
+                       uint32_t reserved5:6;
+                       uint32_t gws_control_queue:1;
+                       uint32_t reserved2:8;
                        enum mes_map_queues_queue_type_enum queue_type:3;
                        uint32_t reserved3:2;
                        enum mes_map_queues_engine_sel_enum engine_sel:3;