bool is_lite_channel;
bool is_40bit_channel;
+ bool is_2712;
};
struct bcm2835_desc {
control_block->info = info;
control_block->src = src;
control_block->dst = dst;
- control_block->stride = (upper_32_bits(dst) << 8) | upper_32_bits(src);
+ if (c->is_2712)
+ control_block->stride = (upper_32_bits(dst) << 8) |
+ upper_32_bits(src);
+ else
+ control_block->stride = 0;
control_block->next = 0;
}
d->cb_list[frame - 1].cb)->next_cb =
to_40bit_cbaddr(cb_entry->paddr);
if (frame && !c->is_40bit_channel)
- d->cb_list[frame - 1].cb->next = to_40bit_cbaddr(cb_entry->paddr);
+ d->cb_list[frame - 1].cb->next = c->is_2712 ?
+ to_40bit_cbaddr(cb_entry->paddr) : cb_entry->paddr;
/* update src and dst and length */
if (src && (info & BCM2835_DMA_S_INC)) {
} else {
writel(BIT(31), c->chan_base + BCM2835_DMA_CS);
- writel(to_40bit_cbaddr(d->cb_list[0].paddr),
+ writel(c->is_2712 ? to_40bit_cbaddr(d->cb_list[0].paddr) : d->cb_list[0].paddr,
c->chan_base + BCM2835_DMA_ADDR);
writel(BCM2835_DMA_ACTIVE | BCM2835_DMA_CS_FLAGS(c->dreq),
c->chan_base + BCM2835_DMA_CS);
d->cb_list[frames - 1].cb)->next_cb =
to_40bit_cbaddr(d->cb_list[0].paddr);
else
- d->cb_list[d->frames - 1].cb->next = to_40bit_cbaddr(d->cb_list[0].paddr);
+ d->cb_list[d->frames - 1].cb->next = c->is_2712 ?
+ to_40bit_cbaddr(d->cb_list[0].paddr) : d->cb_list[0].paddr;
return vchan_tx_prep(&c->vc, &d->vd, flags);
}
else if (readl(c->chan_base + BCM2835_DMA_DEBUG) &
BCM2835_DMA_DEBUG_LITE)
c->is_lite_channel = true;
+ if (d->cfg_data->dma_mask == DMA_BIT_MASK(40))
+ c->is_2712 = true;
return 0;
}