arm: improve tests for vqdmul*

gcc/testsuite/ChangeLog:

	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c: Improve tests.
	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c: Likewise.

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c
index 57ab85e..a5c1a10 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmulht.s16    q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int16x8_t
 foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
 {
   return vqdmulhq_m_n_s16 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmulht.s16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmulht.s16    q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int16x8_t
 foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
 {
   return vqdmulhq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmulht.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c
index 256353a..c78d4db 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmulht.s32    q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int32x4_t
 foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
 {
   return vqdmulhq_m_n_s32 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmulht.s32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmulht.s32    q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int32x4_t
 foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
 {
   return vqdmulhq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmulht.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c
index c24be9e..b5ab6eb 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmulht.s8     q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int8x16_t
 foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
 {
   return vqdmulhq_m_n_s8 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmulht.s8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmulht.s8     q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int8x16_t
 foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
 {
   return vqdmulhq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmulht.s8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c
index 49efeef..2f5fb0e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmulht.s16    q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int16x8_t
 foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
 {
   return vqdmulhq_m_s16 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmulht.s16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmulht.s16    q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int16x8_t
 foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
 {
   return vqdmulhq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmulht.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c
index a561483..80a938a 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmulht.s32    q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int32x4_t
 foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
 {
   return vqdmulhq_m_s32 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmulht.s32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmulht.s32    q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int32x4_t
 foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
 {
   return vqdmulhq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmulht.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c
index 2e016f5..bfb755a 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmulht.s8     q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int8x16_t
 foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
 {
   return vqdmulhq_m_s8 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmulht.s8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmulht.s8     q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int8x16_t
 foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
 {
   return vqdmulhq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmulht.s8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c
index 19534b6..e34689d 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqdmulh.s16     q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int16x8_t
 foo (int16x8_t a, int16_t b)
 {
   return vqdmulhq_n_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmulh.s16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqdmulh.s16     q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int16x8_t
 foo1 (int16x8_t a, int16_t b)
 {
   return vqdmulhq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmulh.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c
index eff9f6e..f967b8a 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqdmulh.s32     q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int32x4_t
 foo (int32x4_t a, int32_t b)
 {
   return vqdmulhq_n_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmulh.s32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqdmulh.s32     q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int32x4_t
 foo1 (int32x4_t a, int32_t b)
 {
   return vqdmulhq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmulh.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c
index 188cf7c..5e1928f 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqdmulh.s8      q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int8x16_t
 foo (int8x16_t a, int8_t b)
 {
   return vqdmulhq_n_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmulh.s8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqdmulh.s8      q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int8x16_t
 foo1 (int8x16_t a, int8_t b)
 {
   return vqdmulhq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmulh.s8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c
index 513a30f..7c0a434 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqdmulh.s16     q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int16x8_t
 foo (int16x8_t a, int16x8_t b)
 {
   return vqdmulhq_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmulh.s16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqdmulh.s16     q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int16x8_t
 foo1 (int16x8_t a, int16x8_t b)
 {
   return vqdmulhq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmulh.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c
index 9cf147d..19f4b03 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqdmulh.s32     q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int32x4_t
 foo (int32x4_t a, int32x4_t b)
 {
   return vqdmulhq_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmulh.s32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqdmulh.s32     q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int32x4_t
 foo1 (int32x4_t a, int32x4_t b)
 {
   return vqdmulhq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmulh.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c
index 87211ad..1784c96 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqdmulh.s8      q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int8x16_t
 foo (int8x16_t a, int8x16_t b)
 {
   return vqdmulhq_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmulh.s8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqdmulh.s8      q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int8x16_t
 foo1 (int8x16_t a, int8x16_t b)
 {
   return vqdmulhq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmulh.s8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c
index f0a4ad5..4f96e19 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmullbt.s16   q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int32x4_t
 foo (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
 {
   return vqdmullbq_m_n_s16 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmullbt.s16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmullbt.s16   q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int32x4_t
 foo1 (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
 {
   return vqdmullbq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmullbt.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c
index 1c7b2e4..d0bca6e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmullbt.s32   q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int64x2_t
 foo (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
 {
   return vqdmullbq_m_n_s32 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmullbt.s32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmullbt.s32   q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int64x2_t
 foo1 (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
 {
   return vqdmullbq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmullbt.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c
index 6a056cf..8448cdc 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmullbt.s16   q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int32x4_t
 foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
 {
   return vqdmullbq_m_s16 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmullbt.s16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmullbt.s16   q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int32x4_t
 foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
 {
   return vqdmullbq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmullbt.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c
index 019c536..48cddcd 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmullbt.s32   q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int64x2_t
 foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
 {
   return vqdmullbq_m_s32 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmullbt.s32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmullbt.s32   q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int64x2_t
 foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
 {
   return vqdmullbq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmullbt.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c
index ec501c3..cd7c394 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqdmullb.s16    q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int32x4_t
 foo (int16x8_t a, int16_t b)
 {
   return vqdmullbq_n_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmullb.s16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqdmullb.s16    q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int32x4_t
 foo1 (int16x8_t a, int16_t b)
 {
   return vqdmullbq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmullb.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c
index 78fe3d6..b4d82f5 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqdmullb.s32    q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int64x2_t
 foo (int32x4_t a, int32_t b)
 {
   return vqdmullbq_n_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmullb.s32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqdmullb.s32    q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int64x2_t
 foo1 (int32x4_t a, int32_t b)
 {
   return vqdmullbq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmullb.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c
index 9a423d3..6f0fdab 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqdmullb.s16    q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int32x4_t
 foo (int16x8_t a, int16x8_t b)
 {
   return vqdmullbq_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmullb.s16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqdmullb.s16    q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int32x4_t
 foo1 (int16x8_t a, int16x8_t b)
 {
   return vqdmullbq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmullb.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c
index f0278cd..2bf952b 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqdmullb.s32    q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int64x2_t
 foo (int32x4_t a, int32x4_t b)
 {
   return vqdmullbq_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmullb.s32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqdmullb.s32    q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int64x2_t
 foo1 (int32x4_t a, int32x4_t b)
 {
   return vqdmullbq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmullb.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c
index 85f0314..6c756eb 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmulltt.s16   q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int32x4_t
 foo (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
 {
   return vqdmulltq_m_n_s16 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmulltt.s16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmulltt.s16   q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int32x4_t
 foo1 (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
 {
   return vqdmulltq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmulltt.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c
index 6bb5004..e46f6b2 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmulltt.s32   q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int64x2_t
 foo (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
 {
   return vqdmulltq_m_n_s32 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmulltt.s32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmulltt.s32   q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int64x2_t
 foo1 (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
 {
   return vqdmulltq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmulltt.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c
index a85393b..8526b3a 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmulltt.s16   q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int32x4_t
 foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
 {
   return vqdmulltq_m_s16 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmulltt.s16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmulltt.s16   q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int32x4_t
 foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
 {
   return vqdmulltq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmulltt.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c
index 82f25b2..809e074 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmulltt.s32   q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int64x2_t
 foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
 {
   return vqdmulltq_m_s32 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmulltt.s32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vqdmulltt.s32   q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int64x2_t
 foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
 {
   return vqdmulltq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmulltt.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c
index f9ad32a..44f0036 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqdmullt.s16    q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int32x4_t
 foo (int16x8_t a, int16_t b)
 {
   return vqdmulltq_n_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmullt.s16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqdmullt.s16    q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int32x4_t
 foo1 (int16x8_t a, int16_t b)
 {
   return vqdmulltq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmullt.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c
index 311b023..b025886 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqdmullt.s32    q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int64x2_t
 foo (int32x4_t a, int32_t b)
 {
   return vqdmulltq_n_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmullt.s32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqdmullt.s32    q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int64x2_t
 foo1 (int32x4_t a, int32_t b)
 {
   return vqdmulltq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmullt.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c
index 851f27a..9508487 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqdmullt.s16    q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int32x4_t
 foo (int16x8_t a, int16x8_t b)
 {
   return vqdmulltq_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmullt.s16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqdmullt.s16    q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int32x4_t
 foo1 (int16x8_t a, int16x8_t b)
 {
   return vqdmulltq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmullt.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c
index 1e81cc3..ab27aed 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vqdmullt.s32    q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int64x2_t
 foo (int32x4_t a, int32x4_t b)
 {
   return vqdmulltq_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmullt.s32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vqdmullt.s32    q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int64x2_t
 foo1 (int32x4_t a, int32x4_t b)
 {
   return vqdmulltq (a, b);
 }
 
-/* { dg-final { scan-assembler "vqdmullt.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file