* config/tc-mips.c (mips_cpu_info_table): Add 74K configurations.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 7c0799d..b01b719 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,4 +1,8 @@
 2007-02-20  Thiemo Seufer  <ths@mips.com>
+
+       * config/tc-mips.c (mips_cpu_info_table): Add 74K configurations.
+
+2007-02-20  Thiemo Seufer  <ths@mips.com>
             Chao-Ying Fu  <fu@mips.com>
 
        * config/tc-mips.c (mips_set_options, mips_opts, file_ase_dspr2,

diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 056f7d2..36478d4 100644 (file)
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -14681,17 +14681,24 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
   { "24kc",           0,                       ISA_MIPS32R2,   CPU_MIPS32R2 },
   { "24kf",           0,                       ISA_MIPS32R2,   CPU_MIPS32R2 },
   { "24kx",           0,                       ISA_MIPS32R2,   CPU_MIPS32R2 },
-  /* 24ke is a 24k with DSP ASE, other ASEs are optional.  */
+  /* 24KE is a 24K with DSP ASE, other ASEs are optional.  */
   { "24kec",          MIPS_CPU_ASE_DSP,                ISA_MIPS32R2,   CPU_MIPS32R2 },
   { "24kef",          MIPS_CPU_ASE_DSP,                ISA_MIPS32R2,   CPU_MIPS32R2 },
   { "24kex",          MIPS_CPU_ASE_DSP,                ISA_MIPS32R2,   CPU_MIPS32R2 },
-  /* 34k is a 24k with DSP and MT ASE, other ASEs are optional.  */
+  /* 34K is a 24K with DSP and MT ASE, other ASEs are optional.  */
   { "34kc",           MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_MT,
                                                ISA_MIPS32R2,   CPU_MIPS32R2 },
   { "34kf",           MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_MT,
                                                ISA_MIPS32R2,   CPU_MIPS32R2 },
   { "34kx",           MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_MT,
                                                ISA_MIPS32R2,   CPU_MIPS32R2 },
+  /* 74K with DSP and DSPR2 ASE, other ASEs are optional.  */
+  { "74kc",           MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_DSPR2,
+                                               ISA_MIPS32R2,   CPU_MIPS32R2 },
+  { "74kf",           MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_DSPR2,
+                                               ISA_MIPS32R2,   CPU_MIPS32R2 },
+  { "74kx",           MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_DSPR2,
+                                               ISA_MIPS32R2,   CPU_MIPS32R2 },
 
   /* MIPS 64 */
   { "5kc",            0,                       ISA_MIPS64,     CPU_MIPS64 },