static void set_pts(struct tegra_usb_phy *phy, u8 pts_val)
{
void __iomem *base = phy->regs;
- unsigned long val;
+ u32 val;
if (phy->soc_config->has_hostpc) {
val = readl_relaxed(base + TEGRA_USB_HOSTPC1_DEVLC);
static void set_phcd(struct tegra_usb_phy *phy, bool enable)
{
void __iomem *base = phy->regs;
- unsigned long val;
+ u32 val;
if (phy->soc_config->has_hostpc) {
val = readl_relaxed(base + TEGRA_USB_HOSTPC1_DEVLC);
{
struct tegra_utmip_config *config = phy->config;
void __iomem *base = phy->pad_regs;
- unsigned long val, flags;
+ unsigned long flags;
+ u32 val;
int err;
err = clk_prepare_enable(phy->pad_clk);
static int utmip_pad_power_off(struct tegra_usb_phy *phy)
{
void __iomem *base = phy->pad_regs;
- unsigned long val, flags;
+ unsigned long flags;
+ u32 val;
int err;
if (!utmip_pad_count) {
static void utmi_phy_clk_disable(struct tegra_usb_phy *phy)
{
void __iomem *base = phy->regs;
- unsigned long val;
+ u32 val;
/*
* The USB driver may have already initiated the phy clock
static void utmi_phy_clk_enable(struct tegra_usb_phy *phy)
{
void __iomem *base = phy->regs;
- unsigned long val;
+ u32 val;
/*
* The USB driver may have already initiated the phy clock
{
struct tegra_utmip_config *config = phy->config;
void __iomem *base = phy->regs;
- unsigned long val;
+ u32 val;
int err;
val = readl_relaxed(base + USB_SUSP_CTRL);
static int utmi_phy_power_off(struct tegra_usb_phy *phy)
{
void __iomem *base = phy->regs;
- unsigned long val;
+ u32 val;
utmi_phy_clk_disable(phy);
static void utmi_phy_preresume(struct tegra_usb_phy *phy)
{
void __iomem *base = phy->regs;
- unsigned long val;
+ u32 val;
val = readl_relaxed(base + UTMIP_TX_CFG0);
val |= UTMIP_HS_DISCON_DISABLE;
static void utmi_phy_postresume(struct tegra_usb_phy *phy)
{
void __iomem *base = phy->regs;
- unsigned long val;
+ u32 val;
val = readl_relaxed(base + UTMIP_TX_CFG0);
val &= ~UTMIP_HS_DISCON_DISABLE;
enum tegra_usb_phy_port_speed port_speed)
{
void __iomem *base = phy->regs;
- unsigned long val;
+ u32 val;
val = readl_relaxed(base + UTMIP_MISC_CFG0);
val &= ~UTMIP_DPDM_OBSERVE_SEL(~0);
static void utmi_phy_restore_end(struct tegra_usb_phy *phy)
{
void __iomem *base = phy->regs;
- unsigned long val;
+ u32 val;
val = readl_relaxed(base + UTMIP_MISC_CFG0);
val &= ~UTMIP_DPDM_OBSERVE;
static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
{
void __iomem *base = phy->regs;
- unsigned long val;
+ u32 val;
int err;
err = gpio_direction_output(phy->reset_gpio, 0);