arm: fix UB when compiling thumb2 with PIC [PR100236]

arm_compute_save_core_reg_mask contains UB in that the saved PIC
register number is used to create a bit mask. However, for some target
options this register is undefined and we end up with a shift of ~0.

On native compilations this is benign since the shift will still be
large enough to move the bit outside of the range of the mask, but if
cross compiling from a system that truncates out-of-range shifts to
zero (or worse, raises a trap for such values) we'll get potentially
wrong code (or a fault).

gcc:
	PR target/100236
	* config/arm/arm.c (THUMB2_WORK_REGS): Check PIC_OFFSET_TABLE_REGNUM
	is valid before including it in the mask.

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 340f7c9..352b2cd 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -1051,9 +1051,13 @@ const char *fp_sysreg_names[NB_FP_SYSREGS] = {
 #define ARM_LSL_NAME "lsl"
 #define streq(string1, string2) (strcmp (string1, string2) == 0)
 
-#define THUMB2_WORK_REGS (0xff & ~(  (1 << THUMB_HARD_FRAME_POINTER_REGNUM) \
-                                  | (1 << SP_REGNUM) | (1 << PC_REGNUM) \
-                                  | (1 << PIC_OFFSET_TABLE_REGNUM)))
+#define THUMB2_WORK_REGS                                       \
+  (0xff & ~((1 << THUMB_HARD_FRAME_POINTER_REGNUM)             \
+           | (1 << SP_REGNUM)                                  \
+           | (1 << PC_REGNUM)                                  \
+           | (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM        \
+              ? (1 << PIC_OFFSET_TABLE_REGNUM)                 \
+              : 0)))
 \f
 /* Initialization code.  */