i965: Fix stencil write enable flag in 3DSTATE_DEPTH_BUFFER on Gen7+.

ctx->Stencil.WriteMask is a statically sized array of 3 elements.
Checking it against 0 actually is a NULL check, and can never fail,
which meant that we always said stencil writes were enabled.

Use the new core Mesa derived state flag to fix this.

NOTE: This is a candidate for stable branches.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>

diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c b/src/mesa/drivers/dri/i965/gen7_misc_state.c
index 2009070..1d3677d 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen7_misc_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c
@@ -50,7 +50,7 @@ gen7_emit_depth_stencil_hiz(struct brw_context *brw,
    OUT_BATCH((depth_mt ? depth_mt->region->pitch - 1 : 0) |
              (depthbuffer_format << 18) |
              ((hiz_mt ? 1 : 0) << 22) |
-             ((stencil_mt != NULL && ctx->Stencil.WriteMask != 0) << 27) |
+             ((stencil_mt != NULL && ctx->Stencil._WriteEnabled) << 27) |
              ((ctx->Depth.Mask != 0) << 28) |
              (depth_surface_type << 29));