arm64: dts: ti: k3-am64: Add GPIO DT nodes
authorAswath Govindraju <a-govindraju@ti.com>
Fri, 19 Mar 2021 05:19:49 +0000 (10:49 +0530)
committerNishanth Menon <nm@ti.com>
Mon, 22 Mar 2021 15:41:24 +0000 (10:41 -0500)
Add device tree nodes for GPIO modules and interrupt controller in main
and mcu domains.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210319051950.17549-2-a-govindraju@ti.com
arch/arm64/boot/dts/ti/k3-am64-main.dtsi
arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi

index a03b664..b997d13 100644 (file)
                clocks = <&k3_clks 145 0>;
        };
 
+       main_gpio_intr: interrupt-controller0 {
+               compatible = "ti,sci-intr";
+               ti,intr-trigger-type = <1>;
+               interrupt-controller;
+               interrupt-parent = <&gic500>;
+               #interrupt-cells = <1>;
+               ti,sci = <&dmsc>;
+               ti,sci-dev-id = <3>;
+               ti,interrupt-ranges = <0 32 16>;
+       };
+
+       main_gpio0: gpio@600000 {
+               compatible = "ti,am64-gpio", "ti,keystone-gpio";
+               reg = <0x0 0x00600000 0x0 0x100>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               interrupt-parent = <&main_gpio_intr>;
+               interrupts = <190>, <191>, <192>,
+                            <193>, <194>, <195>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+               ti,ngpio = <87>;
+               ti,davinci-gpio-unbanked = <0>;
+               power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
+               clocks = <&k3_clks 77 0>;
+               clock-names = "gpio";
+       };
+
+       main_gpio1: gpio@601000 {
+               compatible = "ti,am64-gpio", "ti,keystone-gpio";
+               reg = <0x0 0x00601000 0x0 0x100>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               interrupt-parent = <&main_gpio_intr>;
+               interrupts = <180>, <181>, <182>,
+                            <183>, <184>, <185>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+               ti,ngpio = <88>;
+               ti,davinci-gpio-unbanked = <0>;
+               power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
+               clocks = <&k3_clks 78 0>;
+               clock-names = "gpio";
+       };
+
        sdhci0: mmc@fa10000 {
                compatible = "ti,am64-sdhci-8bit";
                reg = <0x00 0xfa10000 0x00 0x260>, <0x00 0xfa18000 0x00 0x134>;
index 1d2be48..99e94de 100644 (file)
                power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
                clocks = <&k3_clks 148 0>;
        };
+
+       mcu_gpio_intr: interrupt-controller1 {
+               compatible = "ti,sci-intr";
+               ti,intr-trigger-type = <1>;
+               interrupt-controller;
+               interrupt-parent = <&gic500>;
+               #interrupt-cells = <1>;
+               ti,sci = <&dmsc>;
+               ti,sci-dev-id = <5>;
+               ti,interrupt-ranges = <0 104 4>;
+       };
+
+       mcu_gpio0: gpio@4201000 {
+               compatible = "ti,am64-gpio", "keystone-gpio";
+               reg = <0x0 0x4201000 0x0 0x100>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               interrupt-parent = <&mcu_gpio_intr>;
+               interrupts = <30>, <31>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+               ti,ngpio = <23>;
+               ti,davinci-gpio-unbanked = <0>;
+               power-domains = <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>;
+               clocks = <&k3_clks 79 0>;
+               clock-names = "gpio";
+       };
 };