vc4_crtc: Increase setup cost in core clock calculation to handle extreme reduced...

See: https://github.com/raspberrypi/linux/issues/4446

The formula that determines the core clock requirement based on pixel clock and blanking
has been determined experimentally to minimise the clock while supporting all modes we've seen.

A new reduced blanking mode (4kp60 at 533MHz rather than the standard 594MHz) has been seen
that doesn't produce a high enough clock and results in "flip_done timed out" error.

Increase the setup cost in the formula to make this work.
The result is a reduced blanking mode increases by up to 7MHz while leaving the standard timing
mode untouched

Signed-off-by: Dom Cobley <popcornmix@gmail.com>

diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index fb2e15c..c154dc5 100644 (file)
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
@@ -720,7 +720,7 @@ static int vc4_crtc_atomic_check(struct drm_crtc *crtc,
 
                mode = &crtc_state->adjusted_mode;
                if (vc4_encoder->type == VC4_ENCODER_TYPE_HDMI0) {
-                       vc4_state->hvs_load = max(mode->clock * mode->hdisplay / mode->htotal + 1000,
+                       vc4_state->hvs_load = max(mode->clock * mode->hdisplay / mode->htotal + 8000,
                                                  mode->clock * 9 / 10) * 1000;
                } else {
                        vc4_state->hvs_load = mode->clock * 1000;