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ARM64: dts: exynos5433: fix clock for MSCL/JPEG devfreq control
authorMarek Szyprowski <m.szyprowski@samsung.com>
Fri, 1 Jul 2016 10:49:37 +0000 (12:49 +0200)
committerSeung-Woo Kim <sw0312.kim@samsung.com>
Thu, 4 Aug 2016 04:26:19 +0000 (13:26 +0900)
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: Ic1669e9657da1c601774b3bf366cc6036a77147c

arch/arm64/boot/dts/exynos/exynos5433-memory-bus.dtsi patch | blob | history

diff --git a/arch/arm64/boot/dts/exynos/exynos5433-memory-bus.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-memory-bus.dtsi
index c202227..db4297f 100644 (file)
--- a/arch/arm64/boot/dts/exynos/exynos5433-memory-bus.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433-memory-bus.dtsi
@@ -255,7 +255,7 @@
                };
 
                jpeg_block: memory_bus_block7 {
-                       clocks = <&cmu_mscl CLK_SCLK_JPEG>;
+                       clocks = <&cmu_top CLK_SCLK_JPEG_MSCL>;
                        clock-names = "memory-bus";
                        frequency = <
                                400000
Domain: System / Kernel;