[FastISel][AArch64] Optimize compare-and-branch for i1 to use 'tbz'.

Minor enhancement to use 'tbz' for i1 compare-and-branch to get rid of an 'and'
instruction.

This fixes rdar://problem/18784953.

llvm-svn: 220712

diff --git a/llvm/lib/Target/AArch64/AArch64FastISel.cpp b/llvm/lib/Target/AArch64/AArch64FastISel.cpp
index 09bdab7..5527213 100644 (file)
--- a/llvm/lib/Target/AArch64/AArch64FastISel.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FastISel.cpp
@@ -2132,6 +2132,10 @@ bool AArch64FastISel::emitCompareAndBranch(const BranchInst *BI) {
             LHS = AndLHS;
           }
       }
+
+    if (VT == MVT::i1)
+      TestBit = 0;
+
     IsCmpNE = Predicate == CmpInst::ICMP_NE;
   } else if (Predicate == CmpInst::ICMP_SLT) {
     if (!isa<Constant>(RHS))

diff --git a/llvm/test/CodeGen/AArch64/fast-isel-cbz.ll b/llvm/test/CodeGen/AArch64/fast-isel-cbz.ll
index 20c5df1..6e31a04 100644 (file)
--- a/llvm/test/CodeGen/AArch64/fast-isel-cbz.ll
+++ b/llvm/test/CodeGen/AArch64/fast-isel-cbz.ll
@@ -2,8 +2,7 @@
 
 define i32 @icmp_eq_i1(i1 %a) {
 ; CHECK-LABEL: icmp_eq_i1
-; CHECK:       and [[REG:w[0-9]+]], w0, #0x1
-; CHECK:       cbz [[REG]], {{LBB.+_2}}
+; CHECK:       tbz w0, #0, {{LBB.+_2}}
   %1 = icmp eq i1 %a, 0
   br i1 %1, label %bb1, label %bb2
 bb2: