arm: dts: modify clock binding in NPCM750 device tree
authorTomer Maimon <tmaimon77@gmail.com>
Wed, 4 Apr 2018 11:11:00 +0000 (14:11 +0300)
committerArnd Bergmann <arnd@arndb.de>
Thu, 5 Apr 2018 09:13:21 +0000 (11:13 +0200)
Modify clock binding in a common device tree for all Nuvoton
NPCM750 BMCs.

Modify NPCM750 modules clock numbers accourding the new
clock driver.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
arch/arm/boot/dts/nuvoton-npcm750.dtsi

index c7d80d2..d53eccf 100644 (file)
@@ -17,7 +17,7 @@
                cpu@0 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
-                       clocks = <&clk 10>;
+                       clocks = <&clk 0>;
                        clock-names = "clk_cpu";
                        reg = <0>;
                        next-level-cache = <&l2>;
                cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
-                       clocks = <&clk 10>;
+                       clocks = <&clk 0>;
                        clock-names = "clk_cpu";
                        reg = <1>;
                        next-level-cache = <&l2>;
                };
        };
 
-       /* external clock signal rg1refck, supplied by the phy */
-       clk-rg1refck {
+       /* external reference clock */
+       clk-refclk: clk-refclk {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <25000000>;
+               clock-output-names = "refclk";
+       };
+
+       /* external reference clock for cpu. float in normal operation */
+       clk-sysbypck: clk-sysbypck {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <800000000>;
+               clock-output-names = "sysbypck";
+       };
+
+       /* external reference clock for MC. float in normal operation */
+       clk-mcbypck: clk-mcbypck {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <800000000>;
+               clock-output-names = "mcbypck";
+       };
+
+        /* external clock signal rg1refck, supplied by the phy */
+       clk-rg1refck: clk-rg1refck {
                compatible = "fixed-clock";
                #clock-cells = <0>;
                clock-frequency = <125000000>;
+               clock-output-names = "clk-rg1refck";
        };
 
        /* external clock signal rg2refck, supplied by the phy */
-       clk-rg2refck {
+       clk-rg2refck: clk-rg2refck {
                compatible = "fixed-clock";
                #clock-cells = <0>;
                clock-frequency = <125000000>;
+               clock-output-names = "clk-rg2refck";
        };
 
-       clk-xin {
+       clk-xin: clk-xin {
                compatible = "fixed-clock";
                #clock-cells = <0>;
                clock-frequency = <50000000>;
+               clock-output-names = "clk-xin";
        };
 
        soc {
                        interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
                        cache-unified;
                        cache-level = <2>;
-                       clocks = <&clk 22>;
+                       clocks = <&clk 10>;
                        arm,shared-override;
                };
 
                        reg = <0x3fe600 0x20>;
                        interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
                                                  IRQ_TYPE_LEVEL_HIGH)>;
-                       clocks = <&clk 15>;
+                       clocks = <&clk 5>;
                };
        };
 
                ranges;
 
                clk: clock-controller@f0801000 {
-                       compatible = "nuvoton,npcm750-clk";
+                       compatible = "nuvoton,npcm750-clk", "syscon";
                        #clock-cells = <1>;
+                       clock-controller;
                        reg = <0xf0801000 0x1000>;
+                       clock-names = "refclk", "sysbypck", "mcbypck";
+                       clocks = <&clk-refclk>, <&clk-sysbypck>, <&clk-mcbypck>;
                };
 
                apb {
                                compatible = "nuvoton,npcm750-timer";
                                interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0x8000 0x50>;
-                               clocks = <&clk 15>;
+                               clocks = <&clk 5>;
                        };
 
                        watchdog0: watchdog@801C {
                        serial0: serial@1000 {
                                compatible = "nuvoton,npcm750-uart";
                                reg = <0x1000 0x1000>;
-                               clocks = <&clk 14>;
+                               clocks = <&clk 6>;
                                interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
                                reg-shift = <2>;
                                status = "disabled";
                        serial1: serial@2000 {
                                compatible = "nuvoton,npcm750-uart";
                                reg = <0x2000 0x1000>;
-                               clocks = <&clk 14>;
+                               clocks = <&clk 6>;
                                interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
                                reg-shift = <2>;
                                status = "disabled";
                        serial2: serial@3000 {
                                compatible = "nuvoton,npcm750-uart";
                                reg = <0x3000 0x1000>;
-                               clocks = <&clk 14>;
+                               clocks = <&clk 6>;
                                interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
                                reg-shift = <2>;
                                status = "disabled";
                        serial3: serial@4000 {
                                compatible = "nuvoton,npcm750-uart";
                                reg = <0x4000 0x1000>;
-                               clocks = <&clk 14>;
+                               clocks = <&clk 6>;
                                interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
                                reg-shift = <2>;
                                status = "disabled";