unsigned Neighborhood) const {
unsigned N = Neighborhood;
- // Start by searching backwards from Before, looking for kills, reads or defs.
+ // Try searching forwards from Before, looking for reads or defs.
const_iterator I(Before);
+ // If this is the last insn in the block, don't search forwards.
+ if (I != end()) {
+ for (++I; I != end() && N > 0; ++I, --N) {
+ MachineOperandIteratorBase::PhysRegInfo Info =
+ ConstMIOperands(*I).analyzePhysReg(Reg, TRI);
+
+ // Register is live when we read it here.
+ if (Info.Read)
+ return LQR_Live;
+ // Register is dead if we can fully overwrite or clobber it here.
+ if (Info.FullyDefined || Info.Clobbered)
+ return LQR_Dead;
+ }
+ }
+
+ // If we reached the end, it is safe to clobber Reg at the end of a block of
+ // no successor has it live in.
+ if (I == end()) {
+ for (MachineBasicBlock *S : successors()) {
+ for (MCSubRegIterator SubReg(Reg, TRI, /*IncludeSelf*/true);
+ SubReg.isValid(); ++SubReg) {
+ if (S->isLiveIn(*SubReg))
+ return LQR_Live;
+ }
+ }
+
+ return LQR_Dead;
+ }
+
+
+ N = Neighborhood;
+
+ // Start by searching backwards from Before, looking for kills, reads or defs.
+ I = const_iterator(Before);
// If this is the first insn in the block, don't search backwards.
if (I != begin()) {
do {
return LQR_Dead;
}
- N = Neighborhood;
-
- // Try searching forwards from Before, looking for reads or defs.
- I = const_iterator(Before);
- // If this is the last insn in the block, don't search forwards.
- if (I != end()) {
- for (++I; I != end() && N > 0; ++I, --N) {
- MachineOperandIteratorBase::PhysRegInfo Info =
- ConstMIOperands(*I).analyzePhysReg(Reg, TRI);
-
- // Register is live when we read it here.
- if (Info.Read)
- return LQR_Live;
- // Register is dead if we can fully overwrite or clobber it here.
- if (Info.FullyDefined || Info.Clobbered)
- return LQR_Dead;
- }
- }
-
- // If we reached the end, it is safe to clobber Reg at the end of a block of
- // no successor has it live in.
- if (I == end()) {
- for (MachineBasicBlock *S : successors()) {
- for (MCSubRegIterator SubReg(Reg, TRI, /*IncludeSelf*/true);
- SubReg.isValid(); ++SubReg) {
- if (S->isLiveIn(*SubReg))
- return LQR_Live;
- }
- }
-
- return LQR_Dead;
- }
// At this point we have no idea of the liveness of the register.
return LQR_Unknown;
; GCN: successors: %bb.1(0x80000000)
; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 12345
; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
- ; GCN: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64 = V_ADD_I32_e64 [[S_MOV_B32_]], [[DEF]], implicit $exec
+ ; GCN: [[V_ADD_I32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_I32_e32 [[S_MOV_B32_]], [[DEF]], implicit-def $vcc, implicit $exec
; GCN: bb.1:
- ; GCN: S_ENDPGM implicit [[V_ADD_I32_e64_]]
+ ; GCN: S_ENDPGM implicit [[V_ADD_I32_e32_]]
bb.0:
successors: %bb.1
; CHECK-NEXT: lsls r4, r4, #4
; CHECK-NEXT: mov sp, r4
; Incoming register varargs stored via FP
-; CHECK: str r3, [r7, #16]
-; CHECK-NEXT: str r2, [r7, #12]
-; CHECK-NEXT: str r1, [r7, #8]
-
+; CHECK: mov r0, r7
+; CHECK-NEXT: adds r0, #8
+; CHECK-NEXT: stm r0!, {r1, r2, r3}
; VLAs present, access via FP
; int test_args_vla(int a, int b, int c, int d, int e) {
; int v[a];