soc/tegra: pmc: Factor out DPD register bit calculation
authorAapo Vienamo <avienamo@nvidia.com>
Fri, 10 Aug 2018 18:08:08 +0000 (21:08 +0300)
committerThierry Reding <treding@nvidia.com>
Mon, 27 Aug 2018 10:25:17 +0000 (12:25 +0200)
Factor out the the code to calculate the correct DPD register and bit
number for a given pad. This logic will be needed to query the status
register.

Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/soc/tegra/pmc.c

index 75fd907..c04ff5e 100644 (file)
@@ -922,11 +922,12 @@ tegra_io_pad_find(struct tegra_pmc *pmc, enum tegra_io_pad id)
        return NULL;
 }
 
-static int tegra_io_pad_prepare(enum tegra_io_pad id, unsigned long *request,
-                               unsigned long *status, u32 *mask)
+static int tegra_io_pad_get_dpd_register_bit(enum tegra_io_pad id,
+                                            unsigned long *request,
+                                            unsigned long *status,
+                                            u32 *mask)
 {
        const struct tegra_io_pad_soc *pad;
-       unsigned long rate, value;
 
        pad = tegra_io_pad_find(pmc, id);
        if (!pad) {
@@ -947,6 +948,19 @@ static int tegra_io_pad_prepare(enum tegra_io_pad id, unsigned long *request,
                *request = pmc->soc->regs->dpd2_req;
        }
 
+       return 0;
+}
+
+static int tegra_io_pad_prepare(enum tegra_io_pad id, unsigned long *request,
+                               unsigned long *status, u32 *mask)
+{
+       unsigned long rate, value;
+       int err;
+
+       err = tegra_io_pad_get_dpd_register_bit(id, request, status, mask);
+       if (err)
+               return err;
+
        if (pmc->clk) {
                rate = clk_get_rate(pmc->clk);
                if (!rate) {