mmc: renesas_sdhi: newer SoCs don't need manual tap correction
authorTakeshi Saito <takeshi.saito.xv@renesas.com>
Wed, 20 Jul 2022 07:29:01 +0000 (09:29 +0200)
committerUlf Hansson <ulf.hansson@linaro.org>
Thu, 21 Jul 2022 16:03:41 +0000 (18:03 +0200)
The newest Gen3 SoCs and Gen4 SoCs do not need manual tap correction
with HS400 anymore. So, instead of checking the SDHI version, add a
quirk flag and set manual tap correction only for affected SoCs.

Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
[wsa: rebased, renamed the quirk variable, removed stale comment]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20220720072901.1266-1-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/renesas_sdhi.h
drivers/mmc/host/renesas_sdhi_core.c
drivers/mmc/host/renesas_sdhi_internal_dmac.c

index 1a1e3e0..c4abfee 100644 (file)
@@ -43,6 +43,7 @@ struct renesas_sdhi_quirks {
        bool hs400_4taps;
        bool fixed_addr_mode;
        bool dma_one_rx_only;
+       bool manual_tap_correction;
        u32 hs400_bad_taps;
        const u8 (*hs400_calib_table)[SDHI_CALIB_TABLE_MAX];
 };
index 55f7b27..6edbf5c 100644 (file)
@@ -380,8 +380,7 @@ static void renesas_sdhi_hs400_complete(struct mmc_host *mmc)
        sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DT2FF,
                       priv->scc_tappos_hs400);
 
-       /* Gen3 can't do automatic tap correction with HS400, so disable it */
-       if (sd_ctrl_read16(host, CTL_VERSION) == SDHI_VER_GEN3_SDMMC)
+       if (priv->quirks && priv->quirks->manual_tap_correction)
                sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL,
                               ~SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN &
                               sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL));
@@ -718,7 +717,7 @@ static bool renesas_sdhi_manual_correction(struct tmio_mmc_host *host, bool use_
        sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSREQ, 0);
 
        /* Change TAP position according to correction status */
-       if (sd_ctrl_read16(host, CTL_VERSION) == SDHI_VER_GEN3_SDMMC &&
+       if (priv->quirks && priv->quirks->manual_tap_correction &&
            host->mmc->ios.timing == MMC_TIMING_MMC_HS400) {
                u32 bad_taps = priv->quirks ? priv->quirks->hs400_bad_taps : 0;
                /*
index 0ccdbe3..4293759 100644 (file)
@@ -170,6 +170,7 @@ static const struct renesas_sdhi_quirks sdhi_quirks_4tap_nohs400_one_rx = {
 static const struct renesas_sdhi_quirks sdhi_quirks_4tap = {
        .hs400_4taps = true,
        .hs400_bad_taps = BIT(2) | BIT(3) | BIT(6) | BIT(7),
+       .manual_tap_correction = true,
 };
 
 static const struct renesas_sdhi_quirks sdhi_quirks_nohs400 = {
@@ -182,25 +183,30 @@ static const struct renesas_sdhi_quirks sdhi_quirks_fixed_addr = {
 
 static const struct renesas_sdhi_quirks sdhi_quirks_bad_taps1357 = {
        .hs400_bad_taps = BIT(1) | BIT(3) | BIT(5) | BIT(7),
+       .manual_tap_correction = true,
 };
 
 static const struct renesas_sdhi_quirks sdhi_quirks_bad_taps2367 = {
        .hs400_bad_taps = BIT(2) | BIT(3) | BIT(6) | BIT(7),
+       .manual_tap_correction = true,
 };
 
 static const struct renesas_sdhi_quirks sdhi_quirks_r8a7796_es13 = {
        .hs400_4taps = true,
        .hs400_bad_taps = BIT(2) | BIT(3) | BIT(6) | BIT(7),
        .hs400_calib_table = r8a7796_es13_calib_table,
+       .manual_tap_correction = true,
 };
 
 static const struct renesas_sdhi_quirks sdhi_quirks_r8a77965 = {
        .hs400_bad_taps = BIT(2) | BIT(3) | BIT(6) | BIT(7),
        .hs400_calib_table = r8a77965_calib_table,
+       .manual_tap_correction = true,
 };
 
 static const struct renesas_sdhi_quirks sdhi_quirks_r8a77990 = {
        .hs400_calib_table = r8a77990_calib_table,
+       .manual_tap_correction = true,
 };
 
 /*