drm/radeon/si_dpm: Limit clocks on HD86xx part

[ Upstream commit fb9a5b0c1c9893db2e0d18544fd49e19d784a87d ]

Limit clocks on a specific HD86xx part to avoid
crashes (while awaiting an appropriate PP fix).

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>

diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c
index ea6da831c1f1f7581bcd70eba0e42fd9db5cebc9..ac858e0b0eb5936aa06e6f3fc8e1964d8ec27218 100644 (file)
--- a/drivers/gpu/drm/radeon/si_dpm.c
+++ b/drivers/gpu/drm/radeon/si_dpm.c
@@ -2970,6 +2970,12 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev,
                max_sclk = 75000;
                max_mclk = 80000;
        }
+       /* limit clocks on HD8600 series */
+       if (rdev->pdev->device == 0x6660 &&
+           rdev->pdev->revision == 0x83) {
+               max_sclk = 75000;
+               max_mclk = 80000;
+       }
 
        if ((rdev->pm.dpm.new_active_crtc_count > 1) ||
            ni_dpm_vblank_too_short(rdev))