Add window parameter to scheduler

To support window configured outside of
kernels, the parameter is added to scheduler.
The existing operators pass window from
kernels to preserve the current behavior.

Partial Implements: COMPMID-4003

Change-Id: I4514e12fb5b0c60e4adfc1a51e53a8a5de356a0d
Signed-off-by: Sang-Hoon Park <sang-hoon.park@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4892
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>

diff --git a/arm_compute/runtime/CPP/CPPScheduler.h b/arm_compute/runtime/CPP/CPPScheduler.h
index 764af818d9c781f96f7af8366fd4bd5ac464f3dc..9e8fd4174ad00294735e2b21f05248b47ababc62 100644 (file)
--- a/arm_compute/runtime/CPP/CPPScheduler.h
+++ b/arm_compute/runtime/CPP/CPPScheduler.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2020 Arm Limited.
+ * Copyright (c) 2016-2021 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -52,7 +52,7 @@ public:
     void set_num_threads_with_affinity(unsigned int num_threads, BindFunc func) override;
     unsigned int num_threads() const override;
     void schedule(ICPPKernel *kernel, const Hints &hints) override;
-    void schedule_op(ICPPKernel *kernel, const Hints &hints, ITensorPack &tensors) override;
+    void schedule_op(ICPPKernel *kernel, const Hints &hints, const Window &window, ITensorPack &tensors) override;
 
 protected:
     /** Will run the workloads in parallel using num_threads

diff --git a/arm_compute/runtime/IScheduler.h b/arm_compute/runtime/IScheduler.h
index 309aee3bb56fa411c4916e482078277687498522..d3ba86a67bf53bb162c2786036bda8ed6c6ce3c9 100644 (file)
--- a/arm_compute/runtime/IScheduler.h
+++ b/arm_compute/runtime/IScheduler.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2020 Arm Limited.
+ * Copyright (c) 2017-2021 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -35,6 +35,7 @@ namespace arm_compute
 {
 class ICPPKernel;
 class ITensor;
+class Window;
 
 /** Scheduler interface to run kernels */
 class IScheduler
@@ -168,9 +169,10 @@ public:
      *
      * @param[in] kernel  Kernel to execute.
      * @param[in] hints   Hints for the scheduler.
+     * @param[in] window  Window to use for kernel execution.
      * @param[in] tensors Vector containing the tensors to operate on.
      */
-    virtual void schedule_op(ICPPKernel *kernel, const Hints &hints, ITensorPack &tensors) = 0;
+    virtual void schedule_op(ICPPKernel *kernel, const Hints &hints, const Window &window, ITensorPack &tensors) = 0;
 
     /** Execute all the passed workloads
      *
@@ -205,7 +207,14 @@ protected:
     virtual void run_workloads(std::vector<Workload> &workloads) = 0;
     CPUInfo _cpu_info;
 
-    void schedule_common(ICPPKernel *kernel, const Hints &hints, ITensorPack &tensors);
+    /** Common scheduler logic to execute the given kernel
+     *
+     * @param[in] kernel  Kernel to execute.
+     * @param[in] hints   Hints for the scheduler.
+     * @param[in] window  Window to use for kernel execution.
+     * @param[in] tensors Vector containing the tensors to operate on.
+     */
+    void schedule_common(ICPPKernel *kernel, const Hints &hints, const Window &window, ITensorPack &tensors);
 
 private:
     unsigned int _num_threads_hint = {};

diff --git a/arm_compute/runtime/OMP/OMPScheduler.h b/arm_compute/runtime/OMP/OMPScheduler.h
index 56a31cc07660495c72b05c5e13fb03d9fa46c48a..b522b403a90d93874be005f46b995c47e585835b 100644 (file)
--- a/arm_compute/runtime/OMP/OMPScheduler.h
+++ b/arm_compute/runtime/OMP/OMPScheduler.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2020 Arm Limited.
+ * Copyright (c) 2017-2021 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -63,9 +63,10 @@ public:
      *
      * @param[in] kernel  Kernel to execute.
      * @param[in] hints   Hints for the scheduler.
+     * @param[in] window  Window to use for kernel execution.
      * @param[in] tensors Vector containing the tensors to operate on.
      */
-    void schedule_op(ICPPKernel *kernel, const Hints &hints, ITensorPack &tensors) override;
+    void schedule_op(ICPPKernel *kernel, const Hints &hints, const Window &window, ITensorPack &tensors) override;
 
 protected:
     /** Execute all the passed workloads

diff --git a/arm_compute/runtime/SingleThreadScheduler.h b/arm_compute/runtime/SingleThreadScheduler.h
index d45730e49944dc87c7312b5b6dcd6a7f0e282684..a9541d15a72f52b377856ff913a0bef7c413ec0b 100644 (file)
--- a/arm_compute/runtime/SingleThreadScheduler.h
+++ b/arm_compute/runtime/SingleThreadScheduler.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2020 Arm Limited.
+ * Copyright (c) 2017-2021 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -54,9 +54,10 @@ public:
      *
      * @param[in] kernel  Kernel to execute.
      * @param[in] hints   Hints for the scheduler.
+     * @param[in] window  Window to use for kernel execution.
      * @param[in] tensors Vector containing the tensors to operate on.
      */
-    void schedule_op(ICPPKernel *kernel, const Hints &hints, ITensorPack &tensors) override;
+    void schedule_op(ICPPKernel *kernel, const Hints &hints, const Window &window, ITensorPack &tensors) override;
 
 protected:
     /** Will run the workloads sequentially and in order.

diff --git a/src/runtime/CPP/CPPScheduler.cpp b/src/runtime/CPP/CPPScheduler.cpp
index e084cc64944c3be33eb93daec722e56205640ec1..73e26ac18759d6f37dc9907870ac70fd06c75865 100644 (file)
--- a/src/runtime/CPP/CPPScheduler.cpp
+++ b/src/runtime/CPP/CPPScheduler.cpp
@@ -352,14 +352,14 @@ void CPPScheduler::run_workloads(std::vector<IScheduler::Workload> &workloads)
 }
 #endif /* DOXYGEN_SKIP_THIS */
 
-void CPPScheduler::schedule_op(ICPPKernel *kernel, const Hints &hints, ITensorPack &tensors)
+void CPPScheduler::schedule_op(ICPPKernel *kernel, const Hints &hints, const Window &window, ITensorPack &tensors)
 {
-    schedule_common(kernel, hints, tensors);
+    schedule_common(kernel, hints, window, tensors);
 }
 
 void CPPScheduler::schedule(ICPPKernel *kernel, const Hints &hints)
 {
     ITensorPack tensors;
-    schedule_common(kernel, hints, tensors);
+    schedule_common(kernel, hints, kernel->window(), tensors);
 }
 } // namespace arm_compute

diff --git a/src/runtime/CPP/SingleThreadScheduler.cpp b/src/runtime/CPP/SingleThreadScheduler.cpp
index 96265ac757ce2e0b2029b4173f06631f9bdbad15..70536b7ccc81fb3b35d6c4c20df9573f3a973e2f 100644 (file)
--- a/src/runtime/CPP/SingleThreadScheduler.cpp
+++ b/src/runtime/CPP/SingleThreadScheduler.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2020 Arm Limited.
+ * Copyright (c) 2017-2021 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -53,12 +53,12 @@ void SingleThreadScheduler::schedule(ICPPKernel *kernel, const Hints &hints)
     kernel->run(kernel->window(), info);
 }
 
-void SingleThreadScheduler::schedule_op(ICPPKernel *kernel, const Hints &hints, ITensorPack &tensors)
+void SingleThreadScheduler::schedule_op(ICPPKernel *kernel, const Hints &hints, const Window &window, ITensorPack &tensors)
 {
     ARM_COMPUTE_UNUSED(hints);
     ThreadInfo info;
     info.cpu_info = &_cpu_info;
-    kernel->run_op(tensors, kernel->window(), info);
+    kernel->run_op(tensors, window, info);
 }
 
 void SingleThreadScheduler::run_workloads(std::vector<Workload> &workloads)

diff --git a/src/runtime/IScheduler.cpp b/src/runtime/IScheduler.cpp
index 43df3d5e2391347e4f87248cd66fb9003df922c4..eae34b98eb64fc0ddcd9afe2e1621cfad39b97ac 100644 (file)
--- a/src/runtime/IScheduler.cpp
+++ b/src/runtime/IScheduler.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2020 Arm Limited.
+ * Copyright (c) 2016-2021 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -55,14 +55,11 @@ unsigned int IScheduler::num_threads_hint() const
     return _num_threads_hint;
 }
 
-void IScheduler::schedule_common(ICPPKernel *kernel, const Hints &hints, ITensorPack &tensors)
+void IScheduler::schedule_common(ICPPKernel *kernel, const Hints &hints, const Window &window, ITensorPack &tensors)
 {
     ARM_COMPUTE_ERROR_ON_MSG(!kernel, "The child class didn't set the kernel");
-    ARM_COMPUTE_UNUSED(kernel);
-    ARM_COMPUTE_UNUSED(hints);
-    ARM_COMPUTE_UNUSED(tensors);
 #ifndef BARE_METAL
-    const Window &max_window = kernel->window();
+    const Window &max_window = window;
     if(hints.split_dimension() == IScheduler::split_dimensions_all)
     {
         /*
@@ -165,6 +162,8 @@ void IScheduler::schedule_common(ICPPKernel *kernel, const Hints &hints, ITensor
             run_workloads(workloads);
         }
     }
+#else  /* !BARE_METAL */
+    ARM_COMPUTE_UNUSED(kernel, hints, window, tensors);
 #endif /* !BARE_METAL */
 }
 

diff --git a/src/runtime/NEON/INEOperator.cpp b/src/runtime/NEON/INEOperator.cpp
index ff643d1c43164c5cd928e4830ffca008986e7394..ccee8ffc21cd76cd81f474545bdf457add75f9fb 100644 (file)
--- a/src/runtime/NEON/INEOperator.cpp
+++ b/src/runtime/NEON/INEOperator.cpp
@@ -44,7 +44,7 @@ void INEOperator::run(ITensorPack &tensors)
         ARM_COMPUTE_ERROR("No inputs provided");
     }
 
-    NEScheduler::get().schedule_op(_kernel.get(), Window::DimY, tensors);
+    NEScheduler::get().schedule_op(_kernel.get(), Window::DimY, _kernel->window(), tensors);
 }
 
 void INEOperator::prepare(ITensorPack &constants)

diff --git a/src/runtime/NEON/functions/NELogical.cpp b/src/runtime/NEON/functions/NELogical.cpp
index 2c9ebd5f299f450e0de00380006ed2feb9f5b678..190998b042ecedb79daa97113ba229d0126ca3d8 100644 (file)
--- a/src/runtime/NEON/functions/NELogical.cpp
+++ b/src/runtime/NEON/functions/NELogical.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2020 Arm Limited.
+ * Copyright (c) 2020-2021 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -65,7 +65,7 @@ Status NELogicalAnd::validate(const ITensorInfo *input1, const ITensorInfo *inpu
 
 void NELogicalAnd::run()
 {
-    NEScheduler::get().schedule_op(_impl->kernel.get(), Window::DimY, _impl->pack);
+    NEScheduler::get().schedule_op(_impl->kernel.get(), Window::DimY, _impl->kernel->window(), _impl->pack);
 }
 
 struct NELogicalOr::Impl : public LogicalArgs
@@ -98,7 +98,7 @@ Status NELogicalOr::validate(const ITensorInfo *input1, const ITensorInfo *input
 
 void NELogicalOr::run()
 {
-    NEScheduler::get().schedule_op(_impl->kernel.get(), Window::DimY, _impl->pack);
+    NEScheduler::get().schedule_op(_impl->kernel.get(), Window::DimY, _impl->kernel->window(), _impl->pack);
 }
 
 struct NELogicalNot::Impl : public LogicalArgs
@@ -130,6 +130,6 @@ Status NELogicalNot::validate(const ITensorInfo *input, const ITensorInfo *outpu
 
 void NELogicalNot::run()
 {
-    NEScheduler::get().schedule_op(_impl->kernel.get(), Window::DimY, _impl->pack);
+    NEScheduler::get().schedule_op(_impl->kernel.get(), Window::DimY, _impl->kernel->window(), _impl->pack);
 }
 } // namespace arm_compute

diff --git a/src/runtime/NEON/functions/NEPoolingAssemblyDispatch.cpp b/src/runtime/NEON/functions/NEPoolingAssemblyDispatch.cpp
index 2600e2b946eca5e5dedfbea017406dabf516de9b..427cd2eb77116540e11d8626aa64451c63d41395 100644 (file)
--- a/src/runtime/NEON/functions/NEPoolingAssemblyDispatch.cpp
+++ b/src/runtime/NEON/functions/NEPoolingAssemblyDispatch.cpp
@@ -78,11 +78,11 @@ void NEPoolingAssemblyDispatch::run(ITensorPack &tensors)
 
     if(_is_global_pooling_layer)
     {
-        NEScheduler::get().schedule_op(_kernel.get(), Window::DimX, tensors);
+        NEScheduler::get().schedule_op(_kernel.get(), Window::DimX, _kernel->window(), tensors);
     }
     else
     {
-        NEScheduler::get().schedule_op(_kernel.get(), Window::DimY, tensors);
+        NEScheduler::get().schedule_op(_kernel.get(), Window::DimY, _kernel->window(), tensors);
     }
 }
 } // namespace experimental

diff --git a/src/runtime/OMP/OMPScheduler.cpp b/src/runtime/OMP/OMPScheduler.cpp
index bf34b0114b73e1351eb5bfceeacc9f5d764aaa75..a8bd5a0d603e9aa34a6ea74d097c9d92c2d17773 100644 (file)
--- a/src/runtime/OMP/OMPScheduler.cpp
+++ b/src/runtime/OMP/OMPScheduler.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2020 Arm Limited.
+ * Copyright (c) 2017-2021 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -51,16 +51,16 @@ void OMPScheduler::set_num_threads(unsigned int num_threads)
 void OMPScheduler::schedule(ICPPKernel *kernel, const Hints &hints)
 {
     ITensorPack tensors;
-    schedule_common(kernel, hints, tensors);
+    schedule_common(kernel, hints, kernel->window(), tensors);
 }
 
-void OMPScheduler::schedule_op(ICPPKernel *kernel, const Hints &hints, ITensorPack &tensors)
+void OMPScheduler::schedule_op(ICPPKernel *kernel, const Hints &hints, const Window &window, ITensorPack &tensors)
 {
     ARM_COMPUTE_ERROR_ON_MSG(!kernel, "The child class didn't set the kernel");
     ARM_COMPUTE_ERROR_ON_MSG(hints.strategy() == StrategyHint::DYNAMIC,
                              "Dynamic scheduling is not supported in OMPScheduler");
 
-    const Window      &max_window     = kernel->window();
+    const Window      &max_window     = window;
     const unsigned int num_iterations = max_window.num_iterations(hints.split_dimension());
     const unsigned int num_threads    = std::min(num_iterations, _num_threads);
 

diff --git a/src/runtime/cpu/operators/CpuConcatenate.cpp b/src/runtime/cpu/operators/CpuConcatenate.cpp
index 2094e65034b723b1b0384cb15fc2937b32848862..23eb3fceaba0cbf112873e2e95759a49dc8db490 100644 (file)
--- a/src/runtime/cpu/operators/CpuConcatenate.cpp
+++ b/src/runtime/cpu/operators/CpuConcatenate.cpp
@@ -165,7 +165,7 @@ void CpuConcatenate::run(ITensorPack &tensors)
         ITensorPack pack;
         pack.add_tensor(TensorType::ACL_SRC, tensors.get_const_tensor(ACL_SRC_VEC + i));
         pack.add_tensor(TensorType::ACL_DST, tensors.get_tensor(ACL_DST));
-        NEScheduler::get().schedule_op(k.get(), Window::DimY, pack);
+        NEScheduler::get().schedule_op(k.get(), Window::DimY, k->window(), pack);
         ++i;
     }
 }

diff --git a/tests/framework/instruments/SchedulerTimer.cpp b/tests/framework/instruments/SchedulerTimer.cpp
index c81b807c3edf703f82162701ddef38d832993aa6..c31cd42d1955f8458fb2373fbfcb3111976729ec 100644 (file)
--- a/tests/framework/instruments/SchedulerTimer.cpp
+++ b/tests/framework/instruments/SchedulerTimer.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2020 Arm Limited.
+ * Copyright (c) 2017-2021 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -91,10 +91,10 @@ public:
         _kernels.push_back(std::move(info));
     }
 
-    void schedule_op(ICPPKernel *kernel, const Hints &hints, ITensorPack &tensors) override
+    void schedule_op(ICPPKernel *kernel, const Hints &hints, const Window &window, ITensorPack &tensors) override
     {
         _timer.start();
-        _real_scheduler.schedule_op(kernel, hints, tensors);
+        _real_scheduler.schedule_op(kernel, hints, window, tensors);
         _timer.stop();
 
         typename SchedulerClock<output_timestamps>::kernel_info info;