{
struct intel_gt *gt = guc_to_gt(guc);
+ if (!intel_uc_fw_is_available(&guc->fw))
+ return;
+
i915_ggtt_disable_guc(gt->ggtt);
if (intel_guc_is_submission_supported(guc))
void intel_huc_fini(struct intel_huc *huc)
{
+ if (!intel_uc_fw_is_available(&huc->fw))
+ return;
+
intel_huc_rsa_data_destroy(huc);
intel_uc_fw_fini(&huc->fw);
}
intel_uc_fw_cleanup_fetch(&uc->guc.fw);
}
-int intel_uc_init(struct intel_uc *uc)
+void intel_uc_init(struct intel_uc *uc)
{
struct intel_guc *guc = &uc->guc;
struct intel_huc *huc = &uc->huc;
int ret;
if (!intel_uc_uses_guc(uc))
- return 0;
+ return;
/* XXX: GuC submission is unavailable for now */
GEM_BUG_ON(intel_uc_supports_guc_submission(uc));
ret = intel_guc_init(guc);
- if (ret)
- return ret;
-
- if (intel_uc_uses_huc(uc)) {
- intel_huc_init(huc);
+ if (ret) {
+ intel_uc_fw_cleanup_fetch(&huc->fw);
+ return;
}
- return 0;
+ if (intel_uc_uses_huc(uc))
+ intel_huc_init(huc);
}
void intel_uc_fini(struct intel_uc *uc)
void intel_uc_fetch_firmwares(struct intel_uc *uc);
void intel_uc_cleanup_firmwares(struct intel_uc *uc);
void intel_uc_sanitize(struct intel_uc *uc);
+void intel_uc_init(struct intel_uc *uc);
int intel_uc_init_hw(struct intel_uc *uc);
void intel_uc_fini_hw(struct intel_uc *uc);
-int intel_uc_init(struct intel_uc *uc);
void intel_uc_fini(struct intel_uc *uc);
void intel_uc_reset_prepare(struct intel_uc *uc);
void intel_uc_suspend(struct intel_uc *uc);
intel_init_gt_powersave(dev_priv);
- ret = intel_uc_init(&dev_priv->gt.uc);
- if (ret) {
- GEM_BUG_ON(ret == -EIO);
- goto err_pm;
- }
+ intel_uc_init(&dev_priv->gt.uc);
ret = i915_gem_init_hw(dev_priv);
if (ret)
err_init_hw:
intel_uc_fini_hw(&dev_priv->gt.uc);
err_uc_init:
- if (ret != -EIO)
- intel_uc_fini(&dev_priv->gt.uc);
-err_pm:
if (ret != -EIO) {
+ intel_uc_fini(&dev_priv->gt.uc);
intel_cleanup_gt_powersave(dev_priv);
intel_engines_cleanup(dev_priv);
}