Merge branch 'intel_idle+snb' into idle-release

Signed-off-by: Len Brown <len.brown@intel.com>

diff --cc drivers/idle/intel_idle.c
index 8e35c89,84476be..d310590
mode 100644,100755..100644
--- 1/drivers/idle/intel_idle.c
--- 2/drivers/idle/intel_idle.c
+++ b/drivers/idle/intel_idle.c
@@@ -77,13 -77,15 +77,13 @@@ static struct cpuidle_driver intel_idle
  };
  /* intel_idle.max_cstate=0 disables driver */
  static int max_cstate = MWAIT_MAX_NUM_CSTATES - 1;
 -static int power_policy = 7; /* 0 = max perf; 15 = max powersave */
  
 -static unsigned int substates;
 -static int (*choose_substate)(int);
 +static unsigned int mwait_substates;
  
  /* Reliable LAPIC Timer States, bit 1 for C1 etc.  */
- static unsigned int lapic_timer_reliable_states;
+ static unsigned int lapic_timer_reliable_states = (1 << 1);    /* Default to only C1 */
  
 -static struct cpuidle_device *intel_idle_cpuidle_devices;
 +static struct cpuidle_device __percpu *intel_idle_cpuidle_devices;
  static int intel_idle(struct cpuidle_device *dev, struct cpuidle_state *state);
  
  static struct cpuidle_state *cpuidle_state_table;
@@@ -121,6 -126,42 +121,42 @@@ static struct cpuidle_state nehalem_cst
                .enter = &intel_idle },
  };
  
 -              .flags = CPUIDLE_FLAG_TIME_VALID,
+ static struct cpuidle_state snb_cstates[MWAIT_MAX_NUM_CSTATES] = {
+       { /* MWAIT C0 */ },
+       { /* MWAIT C1 */
+               .name = "SNB-C1",
+               .desc = "MWAIT 0x00",
+               .driver_data = (void *) 0x00,
+               .flags = CPUIDLE_FLAG_TIME_VALID,
+               .exit_latency = 1,
+               .target_residency = 4,
+               .enter = &intel_idle },
+       { /* MWAIT C2 */
+               .name = "SNB-C3",
+               .desc = "MWAIT 0x10",
+               .driver_data = (void *) 0x10,
 -              .flags = CPUIDLE_FLAG_TIME_VALID,
++              .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
+               .exit_latency = 80,
+               .target_residency = 160,
+               .enter = &intel_idle },
+       { /* MWAIT C3 */
+               .name = "SNB-C6",
+               .desc = "MWAIT 0x20",
+               .driver_data = (void *) 0x20,
 -              .flags = CPUIDLE_FLAG_TIME_VALID,
++              .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
+               .exit_latency = 104,
+               .target_residency = 208,
+               .enter = &intel_idle },
+       { /* MWAIT C4 */
+               .name = "SNB-C7",
+               .desc = "MWAIT 0x30",
+               .driver_data = (void *) 0x30,
++              .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
+               .exit_latency = 109,
+               .target_residency = 300,
+               .enter = &intel_idle },
+ };
+ 
  static struct cpuidle_state atom_cstates[MWAIT_MAX_NUM_CSTATES] = {
        { /* MWAIT C0 */ },
        { /* MWAIT C1 */
@@@ -265,10 -343,17 +301,15 @@@ static int intel_idle_probe(void
                break;
  
        case 0x1C:      /* 28 - Atom Processor */
 +      case 0x26:      /* 38 - Lincroft Atom Processor */
                lapic_timer_reliable_states = (1 << 2) | (1 << 1); /* C2, C1 */
                cpuidle_state_table = atom_cstates;
 -              choose_substate = choose_zero_substate;
                break;
 -              choose_substate = choose_zero_substate;
+ 
+       case 0x2A:      /* SNB */
+       case 0x2D:      /* SNB Xeon */
+               cpuidle_state_table = snb_cstates;
+               break;
  #ifdef FUTURE_USE
        case 0x17:      /* 23 - Core 2 Duo */
                lapic_timer_reliable_states = (1 << 2) | (1 << 1); /* C2, C1 */