<field name="MFX Pipeline Command Flush" start="51" end="51" type="bool"/>
</instruction>
+ <register name="3D_CHICKEN3" length="1" num="0x2090">
+ <field name="AA Line Quality Fix" start="5" end="5" type="bool"/>
+ <field name="AA Line Quality Fix Mask" start="21" end="21" type="bool"/>
+ </register>
+
<register name="BCS_INSTDONE" length="1" num="0x2206c">
<field name="Ring Enable" start="0" end="0" type="bool"/>
<field name="Blitter IDLE" start="1" end="1" type="bool" default="1"/>
<field name="MFX Pipeline Command Flush" start="51" end="51" type="bool"/>
</instruction>
+ <register name="3D_CHICKEN3" length="1" num="0x2090">
+ <field name="AA Line Quality Fix" start="5" end="5" type="bool"/>
+ <field name="AA Line Quality Fix Mask" start="21" end="21" type="bool"/>
+ </register>
+
<register name="BCS_INSTDONE" length="1" num="0x2206c">
<field name="Ring Enable" start="0" end="0" type="bool"/>
<field name="Blitter IDLE" start="1" end="1" type="bool" default="1"/>
<field name="Per Sample Blend Opt Disable Mask" start="27" end="27" type="bool"/>
</register>
+ <register name="CHICKEN_RASTER_1" length="1" num="0x6204">
+ <field name="AA Line Quality Fix" start="5" end="5" type="bool"/>
+ <field name="AA Line Quality Fix Mask" start="21" end="21" type="bool"/>
+ </register>
+
<register name="CL_INVOCATION_COUNT" length="2" num="0x2338">
<field name="CL Invocation Count Report" start="0" end="63" type="uint"/>
</register>
.maxCombinedClipAndCullDistances = 8,
.discreteQueuePriorities = 2,
.pointSizeRange = { 0.125, 255.875 },
- .lineWidthRange = {
- 0.0,
- (devinfo->ver >= 9 || devinfo->is_cherryview) ?
- 2047.9921875 : 7.9921875,
- },
+ /* While SKL and up support much wider lines than we are setting here,
+ * in practice we run into conformance issues if we go past this limit.
+ * Since the Windows driver does the same, it's probably fair to assume
+ * that no one needs more than this.
+ */
+ .lineWidthRange = { 0.0, 8.0 },
.pointSizeGranularity = (1.0 / 8.0),
.lineWidthGranularity = (1.0 / 128.0),
.strictLines = false,
void
genX(rasterization_mode)(VkPolygonMode raster_mode,
VkLineRasterizationModeEXT line_mode,
+ float line_width,
uint32_t *api_mode,
bool *msaa_rasterization_enable);
void
genX(rasterization_mode)(VkPolygonMode raster_mode,
VkLineRasterizationModeEXT line_mode,
+ float line_width,
uint32_t *api_mode,
bool *msaa_rasterization_enable)
{
switch (line_mode) {
case VK_LINE_RASTERIZATION_MODE_RECTANGULAR_EXT:
*api_mode = DX100;
+#if GFX_VER <= 9
+ /* Prior to ICL, the algorithm the HW uses to draw wide lines
+ * doesn't quite match what the CTS expects, at least for rectangular
+ * lines, so we set this to false here, making it draw parallelograms
+ * instead, which work well enough.
+ */
+ *msaa_rasterization_enable = line_width < 1.0078125;
+#else
*msaa_rasterization_enable = true;
+#endif
break;
case VK_LINE_RASTERIZATION_MODE_RECTANGULAR_SMOOTH_EXT:
#if GFX_VER >= 8
if (!dynamic_primitive_topology)
genX(rasterization_mode)(raster_mode, pipeline->line_mode,
+ rs_info->lineWidth,
&raster.APIMode,
&raster.DXMultisampleRasterizationEnable);
cc1.ReplayMode = MidcmdbufferPreemption;
cc1.ReplayModeMask = true;
}
+
+#if GFX_VERx10 < 125
+#define AA_LINE_QUALITY_REG GENX(3D_CHICKEN3)
+#else
+#define AA_LINE_QUALITY_REG GENX(CHICKEN_RASTER_1)
+#endif
+
+ /* Enable the new line drawing algorithm that produces higher quality
+ * lines.
+ */
+ anv_batch_write_reg(&batch, AA_LINE_QUALITY_REG, c3) {
+ c3.AALineQualityFix = true;
+ c3.AALineQualityFixMask = true;
+ }
#endif
#if GFX_VER == 12
primitive_topology);
genX(rasterization_mode)(
- dynamic_raster_mode, pipeline->line_mode, &api_mode,
- &msaa_raster_enable);
+ dynamic_raster_mode, pipeline->line_mode, d->line_width,
+ &api_mode, &msaa_raster_enable);
aa_enable =
anv_rasterization_aa_mode(dynamic_raster_mode,