mpc85xx/t104xrdb: convert deep sleep to generic board interface

A new interface is introduced to support generic board structure.
Converts it to use new interface.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c
index 2c331ee..5aa11b1 100644 (file)
--- a/board/freescale/t104xrdb/ddr.c
+++ b/board/freescale/t104xrdb/ddr.c
@@ -11,6 +11,7 @@
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr_dimm_params.h>
 #include <asm/fsl_law.h>
+#include <asm/mpc85xx_gpio.h>
 #include "ddr.h"
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -109,6 +110,19 @@ found:
        popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
 }
 
+#if defined(CONFIG_DEEP_SLEEP)
+void board_mem_sleep_setup(void)
+{
+       void __iomem *cpld_base = (void *)CONFIG_SYS_CPLD_BASE;
+
+       /* does not provide HW signals for power management */
+       clrbits_8(cpld_base + 0x17, 0x40);
+       /* Disable MCKE isolation */
+       gpio_set_value(2, 0);
+       udelay(1);
+}
+#endif
+
 phys_size_t initdram(int board_type)
 {
        phys_size_t dram_size;
@@ -124,5 +138,10 @@ phys_size_t initdram(int board_type)
 #else
        dram_size =  fsl_ddr_sdram_size();
 #endif
+
+#if defined(CONFIG_DEEP_SLEEP) && !defined(CONFIG_SPL_BUILD)
+       fsl_dp_resume();
+#endif
+
        return dram_size;
 }

diff --git a/board/freescale/t104xrdb/spl.c b/board/freescale/t104xrdb/spl.c
index e394b12..4e8735b 100644 (file)
--- a/board/freescale/t104xrdb/spl.c
+++ b/board/freescale/t104xrdb/spl.c
@@ -11,7 +11,7 @@
 #include <mmc.h>
 #include <fsl_esdhc.h>
 #include <spi_flash.h>
-#include <asm/mpc85xx_gpio.h>
+#include "../common/sleep.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -64,8 +64,8 @@ void board_init_f(ulong bootflag)
 
 #ifdef CONFIG_DEEP_SLEEP
        /* disable the console if boot from deep sleep */
-       if (in_be32(&gur->scrtsr[0]) & (1 << 3))
-               gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE;
+       if (is_warm_boot())
+               fsl_dp_disable_console();
 #endif
        /* compiler optimization barrier needed for GCC >= 3.4 */
        __asm__ __volatile__("" : : : "memory");
@@ -132,16 +132,3 @@ void board_init_r(gd_t *gd, ulong dest_addr)
        nand_boot();
 #endif
 }
-
-#ifdef CONFIG_DEEP_SLEEP
-void board_mem_sleep_setup(void)
-{
-       void __iomem *cpld_base = (void *)CONFIG_SYS_CPLD_BASE;
-
-       /* does not provide HW signals for power management */
-       clrbits_8(cpld_base + 0x17, 0x40);
-       /* Disable MCKE isolation */
-       gpio_set_value(2, 0);
-       udelay(1);
-}
-#endif

diff --git a/board/freescale/t104xrdb/t104xrdb.c b/board/freescale/t104xrdb/t104xrdb.c
index 4734f9d..9cd5e15 100644 (file)
--- a/board/freescale/t104xrdb/t104xrdb.c
+++ b/board/freescale/t104xrdb/t104xrdb.c
@@ -17,8 +17,7 @@
 #include <asm/fsl_portals.h>
 #include <asm/fsl_liodn.h>
 #include <fm_eth.h>
-#include <asm/mpc85xx_gpio.h>
-
+#include "../common/sleep.h"
 #include "t104xrdb.h"
 #include "cpld.h"
 
@@ -44,6 +43,16 @@ int checkboard(void)
        return 0;
 }
 
+int board_early_init_f(void)
+{
+#if defined(CONFIG_DEEP_SLEEP)
+       if (is_warm_boot())
+               fsl_dp_disable_console();
+#endif
+
+       return 0;
+}
+
 int board_early_init_r(void)
 {
 #ifdef CONFIG_SYS_FLASH_BASE
@@ -113,14 +122,3 @@ int ft_board_setup(void *blob, bd_t *bd)
 
        return 0;
 }
-
-#ifdef CONFIG_DEEP_SLEEP
-void board_mem_sleep_setup(void)
-{
-       /* does not provide HW signals for power management */
-       CPLD_WRITE(misc_ctl_status, (CPLD_READ(misc_ctl_status) & ~0x40));
-       /* Disable MCKE isolation */
-       gpio_set_value(2, 0);
-       udelay(1);
-}
-#endif

diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index a54e0eb..57cdf72 100644 (file)
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -104,7 +104,10 @@
 
 /* support deep sleep */
 #define CONFIG_DEEP_SLEEP
+#if defined(CONFIG_DEEP_SLEEP)
+#define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_SILENT_CONSOLE
+#endif
 
 #ifndef CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_TEXT_BASE   0xeff40000