Change-Id: I1e06e930908ce5083a65a8022734253b2f47667c
pa_source *ns;
mir_node data;
mir_node_type type;
pa_source *ns;
mir_node data;
mir_node_type type;
pa_assert(u);
pa_assert(sink);
pa_assert(u);
pa_assert(sink);
}
}
else if (!module || !pa_streq(module->name, "module-combine-sink")) {
}
}
else if (!module || !pa_streq(module->name, "module-combine-sink")) {
memset(&data, 0, sizeof(data));
data.key = pa_xstrdup(sink->name);
data.direction = mir_output;
memset(&data, 0, sizeof(data));
data.key = pa_xstrdup(sink->name);
data.direction = mir_output;
data.amname = pa_xstrdup(mir_node_type_str(data.type));
data.amid = AM_ID_INVALID;
data.paname = pa_xstrdup(sink->name);
data.amname = pa_xstrdup(mir_node_type_str(data.type));
data.amid = AM_ID_INVALID;
data.paname = pa_xstrdup(sink->name);
}
else {
pa_xfree(data.key); /* for now */
}
else {
pa_xfree(data.key); /* for now */
- create_node(u, &data, NULL);
+ node = create_node(u, &data, NULL);
+
+ if (add_to_hash)
+ pa_discover_add_node_to_ptr_hash(u, sink, node);
pa_muxnode *mux;
pa_nodeset_resdef *resdef;
bool loopback;
pa_muxnode *mux;
pa_nodeset_resdef *resdef;
bool loopback;
pa_assert(u);
pa_assert(data);
pa_assert(u);
pa_assert(data);
}
else {
loopback = pa_streq(mnam, "module-loopback");
}
else {
loopback = pa_streq(mnam, "module-loopback");
if (loopback) {
if (!(node = pa_utils_get_node_from_data(u, mir_input, data))) {
if (loopback) {
if (!(node = pa_utils_get_node_from_data(u, mir_input, data))) {
type = pa_classify_guess_stream_node_type(u, pl, NULL);
}
else {
type = pa_classify_guess_stream_node_type(u, pl, NULL);
}
else {
+ remap = pa_streq(mnam, "module-remap-sink");
type = pa_classify_guess_stream_node_type(u, pl, &resdef);
pa_utils_set_resource_properties(pl, resdef);
type = pa_classify_guess_stream_node_type(u, pl, &resdef);
pa_utils_set_resource_properties(pl, resdef);
+ if (remap) {
+ /* no ramp needed */
+ return true;
+ }
if (loopback && data->sink && data->sink->module) {
/* no ramp needed */
if (pa_streq(data->sink->module->name, "module-combine-sink"))
if (loopback && data->sink && data->sink->module) {
/* no ramp needed */
if (pa_streq(data->sink->module->name, "module-combine-sink"))