-#if defined (CONFIG_CM10200E) || defined (CONFIG_CM10220E)
-#define CMMASK_INIT_102 0x00000300 /* see CM102xx ref manual */
- /* - PLL test clock bypassed */
- /* - bus clock ratio 2 */
- /* - little endian */
- /* - vectors at zero */
-#endif /* CM1022xx */
-
-/* Determine CM characteristics */
-
-#undef CONFIG_CM_MULTIPLE_SSRAM
-#undef CONFIG_CM_SPD_DETECT
-#undef CONFIG_CM_REMAP
-#undef CONFIG_CM_INIT
-#undef CONFIG_CM_TCRAM
-
-#if defined (CONFIG_CM946E_S) || defined (CONFIG_CM966E_S)
-#define CONFIG_CM_MULTIPLE_SSRAM /* CM has multiple SSRAM mapping */
-#endif
-
-/* Excalibur core module has reduced functionality */
-#ifndef CONFIG_CM922T_XA10
-#define CONFIG_CM_SPD_DETECT /* CM supports SPD query */
-#define OS_SPD 0x00000100 /* Address of SPD data */
-#define CONFIG_CM_REMAP /* CM supports remapping */
-#define CONFIG_CM_INIT /* CM has initialization reg */
-#endif /* NOT EXCALIBUR */
-
-#if defined(CONFIG_CM926EJ_S) || defined (CONFIG_CM946E_S) || \
- defined(CONFIG_CM966E_S) || defined (CONFIG_CM1026EJ_S) || \
- defined(CONFIG_CM1136JF_S)
-#define CONFIG_CM_TCRAM /* CM has TCRAM */
-#endif
-
-#ifdef CONFIG_CM_SPD_DETECT