merge with master tizen_2.1 2.1b_release accepted/tizen_2.1/20130425.022331 submit/tizen_2.1/20130424.235511
authorJinkun Jang <jinkun.jang@samsung.com>
Fri, 15 Mar 2013 16:25:05 +0000 (01:25 +0900)
committerJinkun Jang <jinkun.jang@samsung.com>
Fri, 15 Mar 2013 16:25:05 +0000 (01:25 +0900)
24 files changed:
Makefile
arch/arm/cpu/armv7/exynos/soc.c
arch/arm/include/asm/arch-exynos/cpu.h
arch/arm/include/asm/arch-exynos/dw_mmc.h [new file with mode: 0644]
board/samsung/common/Makefile [deleted file]
board/samsung/trats/Makefile
board/samsung/trats/common.c [moved from board/samsung/common/common.c with 100% similarity]
board/samsung/trats/inform.c [moved from board/samsung/common/inform.c with 100% similarity]
board/samsung/trats/trats.c
board/samsung/trats2/Makefile [deleted file]
board/samsung/trats2/lowlevel_init.S [deleted file]
board/samsung/trats2/trats2.c [deleted file]
boards.cfg
common/cmd_usbd.c
drivers/misc/max77686.c
drivers/misc/max77693.c
drivers/misc/max77693_fg.c
drivers/mmc/Makefile
drivers/mmc/s5p_dw_mmc.c [new file with mode: 0644]
drivers/mobile/Tizen_GPT_Ver10.h [deleted file]
include/configs/exynos_trats2.h [deleted file]
include/fuelgauge_battery_data.h
include/max77686.h
include/max77693.h

index 0a251be..c58f375 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -437,11 +437,7 @@ endif
                @echo -n `date +%Y%m%d%H` > sig-date
                @echo -n "none" > sig-product
                @# workaround for old version used board
                @echo -n `date +%Y%m%d%H` > sig-date
                @echo -n "none" > sig-product
                @# workaround for old version used board
-ifeq ($(BOARD),trats)
                @echo -n "slp_u1" > sig-board
                @echo -n "slp_u1" > sig-board
-else
-               @echo -n "slp_midasq" > sig-board
-endif
                @cat sig-magic /dev/zero | head -c 12 > sig-tmp
                @cat sig-tmp sig-date /dev/zero | head -c 24 > sig-tmp2
                @cat sig-tmp2 sig-product /dev/zero | head -c 48 > sig-tmp
                @cat sig-magic /dev/zero | head -c 12 > sig-tmp
                @cat sig-tmp sig-date /dev/zero | head -c 24 > sig-tmp2
                @cat sig-tmp2 sig-product /dev/zero | head -c 48 > sig-tmp
index ffca083..2adb796 100644 (file)
@@ -26,48 +26,3 @@ void reset_cpu(ulong addr)
 {
        writel(0x1, samsung_get_base_swreset());
 }
 {
        writel(0x1, samsung_get_base_swreset());
 }
-
-/*
- * return: xxxx MB
- */
-int exynos_get_dram_size(void)
-{
-       u32 dmc_base = samsung_get_base_dmc();
-       u32 memcontrol;
-       u32 memconfig0, memconfig1;
-       u32 chip_num;
-       u32 size;
-
-       memcontrol = readl(dmc_base + 0x4);
-       memconfig0 = readl(dmc_base + 0x8);
-
-       /* chip_num = MEMCONTROL[19:16] */
-       chip_num = (memcontrol >> 16) & 0xf;
-       switch (chip_num) {
-       case 1:
-               memconfig1 = readl(dmc_base + 0xc);
-               /* chip_mask = MEMCONFIGx[23:16] */
-               size = ((memconfig0 + memconfig1) >> 16) & 0xff;
-               size = ((~size + 1) & 0xff) << 4;
-               break;
-       case 0:
-       default:
-               size = (memconfig0 >> 16) & 0xff;
-               size = ((~size + 1) & 0xff) << 4;
-               break;
-       }
-
-       return size;
-}
-
-static void exynos_chip_info(void)
-{
-       printf("Pro ID:\t0x%08X\n", readl(S5P_PRO_ID));
-       printf("Pkg ID:\t0x%08X\n", readl(S5P_PRO_ID + 4));
-}
-
-U_BOOT_CMD(
-       chipinfo, 1, 1, exynos_chip_info,
-       "print chip info (product id, package id, lot id, ...)",
-       "chipinfo\n"
-);
index 1aa77b9..f1767af 100644 (file)
@@ -70,7 +70,6 @@
 #define EXYNOS4_SWRESET                (EXYNOS4_POWER_BASE + 0x400)
 #define EXYNOS4_RST_STAT       (EXYNOS4_POWER_BASE + 0x404)
 
 #define EXYNOS4_SWRESET                (EXYNOS4_POWER_BASE + 0x400)
 #define EXYNOS4_RST_STAT       (EXYNOS4_POWER_BASE + 0x404)
 
-#define S5P_PRO_ID             EXYNOS4_PRO_ID
 #define S5P_SWRESET            EXYNOS4_SWRESET
 #define S5P_RST_STAT           EXYNOS4_RST_STAT
 
 #define S5P_SWRESET            EXYNOS4_SWRESET
 #define S5P_RST_STAT           EXYNOS4_RST_STAT
 
@@ -167,7 +166,6 @@ SAMSUNG_BASE(usb_phy, USBPHY_BASE)
 SAMSUNG_BASE(usb_otg, USBOTG_BASE)
 SAMSUNG_BASE(systimer, MCT_BASE)
 SAMSUNG_BASE(watchdog, WDT_BASE)
 SAMSUNG_BASE(usb_otg, USBOTG_BASE)
 SAMSUNG_BASE(systimer, MCT_BASE)
 SAMSUNG_BASE(watchdog, WDT_BASE)
-SAMSUNG_BASE(dmc, DMC0_BASE)
 #endif
 
 #endif /* __ASM_ARCH_CPU_H */
 #endif
 
 #endif /* __ASM_ARCH_CPU_H */
diff --git a/arch/arm/include/asm/arch-exynos/dw_mmc.h b/arch/arm/include/asm/arch-exynos/dw_mmc.h
new file mode 100644 (file)
index 0000000..17695ff
--- /dev/null
@@ -0,0 +1,77 @@
+/*
+ * (C) Copyright 2011 SAMSUNG Electronics
+ * Jaehoon Chung <jh80.chung@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#ifndef __ASM_ARCH_DW_MMC_H_
+#define __ASM_ARCH_DW_MMC_H_
+
+#ifndef __ASSEMBLY__
+struct s5p_dw_mmc {
+       unsigned int    ctrl;
+       unsigned int    pwren;
+       unsigned int    clkdiv;
+       unsigned int    clksrc;
+       unsigned int    clkena;
+       unsigned int    tmout;
+       unsigned int    ctype;
+       unsigned int    blksiz;
+       unsigned int    bytcnt;
+       unsigned int    intmask;
+       unsigned int    cmdarg;
+       unsigned int    cmd;
+       unsigned int    resp0;
+       unsigned int    resp1;
+       unsigned int    resp2;
+       unsigned int    resp3;
+       unsigned int    mintsts;
+       unsigned int    rintsts;
+       unsigned int    status;
+       unsigned int    fifo;
+       unsigned int    cdetect;
+       unsigned int    wrtprt;
+       unsigned int    gpio;
+       unsigned int    tcpcnt;
+       unsigned int    tbbcnt;
+       unsigned int    debnce;
+       unsigned int    usrid;
+       unsigned int    verid;
+       unsigned int    hcon;
+       unsigned int    uhs_reg;
+       unsigned char   res1[8];
+       unsigned int    bmod;
+       unsigned int    pldmnd;
+       unsigned int    dbaddr;
+       unsigned int    idsts;
+       unsigned int    idinten;
+       unsigned int    dscaddr;
+       unsigned int    bufaddr;
+       unsigned int    clksel;
+       unsigned int    res2[0xff5f];
+};
+
+struct dw_mmc_host {
+       struct s5p_dw_mmc *reg;
+       unsigned int clock;
+       int dev_index;
+};
+
+int s5p_mmc_init(int dev_index, int bus_width);
+
+#endif /* __ASSEMBLY__ */
+#endif  /* __ASM_ARCH_DW_MMC_H_ */
diff --git a/board/samsung/common/Makefile b/board/samsung/common/Makefile
deleted file mode 100644 (file)
index 0bc8f5f..0000000
+++ /dev/null
@@ -1,49 +0,0 @@
-#
-# Copyright (c) 2000 - 2012 Samsung Electronics Co., Ltd. All rights reserved.
-# Sanghee Kim <sh0130.kim@samsung.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-ifneq ($(OBJTREE),$(SRCTREE))
-$(shell mkdir -p $(obj)board/$(VENDOR)/common)
-endif
-
-LIB    = $(obj)lib$(VENDOR).o
-
-COBJS-y        := common.o
-COBJS-y        += inform.o
-
-COBJS  := $(sort $(COBJS-y))
-SRCS   := $(COBJS:.o=.c)
-OBJS   := $(addprefix $(obj),$(COBJS))
-
-$(LIB):        $(obj).depend $(SOBJS) $(OBJS)
-       $(call cmd_link_o_target, $(SOBJS) $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
index 635fc37..5a41983 100644 (file)
@@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk
 LIB    = $(obj)lib$(BOARD).o
 
 COBJS-y        := trats.o
 LIB    = $(obj)lib$(BOARD).o
 
 COBJS-y        := trats.o
+COBJS-y += common.o inform.o
 
 SOBJS  := lowlevel_init.o
 
 
 SOBJS  := lowlevel_init.o
 
index 47f5994..3af8a77 100644 (file)
@@ -505,7 +505,7 @@ static void check_battery(void)
 static void init_rtc_max8997(void)
 {
        unsigned char addr = MAX8997_RTC_ADDR;
 static void init_rtc_max8997(void)
 {
        unsigned char addr = MAX8997_RTC_ADDR;
-       unsigned char val[2] = {0,};
+       unsigned char val[2];
 
        i2c_set_bus_num(I2C_5);
 
 
        i2c_set_bus_num(I2C_5);
 
@@ -515,9 +515,8 @@ static void init_rtc_max8997(void)
        }
 
        /* Disable SMPL & WTSR */
        }
 
        /* Disable SMPL & WTSR */
-       i2c_write(addr, 0x6, 1, val, 1);
-       val[0] = 1;
-       i2c_write(addr, 0x4, 1, val, 1);
+       i2c_write(addr, 0x4, 1, 0x1, 1);
+       i2c_write(addr, 0x6, 1, 0x0, 1);
 }
 
 #if defined(CONFIG_EXTERNAL_CHARGER)
 }
 
 #if defined(CONFIG_EXTERNAL_CHARGER)
@@ -839,23 +838,6 @@ static void check_keypad(void)
                setenv("bootcmd", "usbdown");
 }
 
                setenv("bootcmd", "usbdown");
 }
 
-static void check_ta_usb(void)
-{
-       unsigned char addr = MAX8997_MUIC_ADDR;
-       unsigned char int2;
-
-       if (ta_usb_connected)
-               return;
-
-       i2c_read(addr, 0x2, 1, &int2, 1);
-
-       /* check whether ta or usb cable have been attached */
-       if ((int2 & 0x10)) {
-               init_rtc_max8997();
-               power_off();
-       }
-}
-
 #ifdef CONFIG_LCD
 void fimd_clk_set(void)
 {
 #ifdef CONFIG_LCD
 void fimd_clk_set(void)
 {
@@ -1365,7 +1347,6 @@ int misc_init_r(void)
        check_auto_burn();
 
        ta_usb_connected = muic_check_type();
        check_auto_burn();
 
        ta_usb_connected = muic_check_type();
-       check_ta_usb();
 #ifdef CONFIG_CMD_PIT
        check_pit();
 #endif
 #ifdef CONFIG_CMD_PIT
        check_pit();
 #endif
diff --git a/board/samsung/trats2/Makefile b/board/samsung/trats2/Makefile
deleted file mode 100644 (file)
index 97ec3e4..0000000
+++ /dev/null
@@ -1,51 +0,0 @@
-#
-# Copyright (c) 2000 - 2011 Samsung Electronics Co., Ltd. All rights reserved.
-# Sanghee Kim <sh0130.kim@samsung.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB    = $(obj)lib$(BOARD).o
-
-COBJS-y        := trats2.o
-SOBJS  := lowlevel_init.o
-
-SRCS    := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS   := $(addprefix $(obj),$(COBJS-y))
-SOBJS  := $(addprefix $(obj),$(SOBJS))
-
-$(LIB):        $(obj).depend $(SOBJS) $(OBJS)
-       $(call cmd_link_o_target, $(SOBJS) $(OBJS))
-
-clean:
-       rm -f $(SOBJS) $(OBJS)
-
-distclean:     clean
-       rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/board/samsung/trats2/lowlevel_init.S b/board/samsung/trats2/lowlevel_init.S
deleted file mode 100644 (file)
index a70cd8c..0000000
+++ /dev/null
@@ -1,535 +0,0 @@
-/*
- * Lowlevel setup for MIDAS board based on EXYNOS4
- *
- * Copyright (c) 2000 - 2011 Samsung Electronics Co., Ltd. All rights reserved.
- * Kyungmin Park <kyungmin.park@samsung.com>
- * Sanghee Kim <sh0130.kim@samsung.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <version.h>
-#include <asm/arch/cpu.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/power.h>
-
-/*
- * Register usages:
- *
- * r5 has zero always
- * r7 has GPIO part1 base 0x11400000
- * r6 has GPIO part2 base 0x11000000
- */
-
-       .globl lowlevel_init
-lowlevel_init:
-       mov     r11, lr
-
-       /* r5 has always zero */
-       mov     r5, #0
-
-       ldr     r7, =EXYNOS4_GPIO_PART1_BASE
-       ldr     r6, =EXYNOS4_GPIO_PART2_BASE
-
-       /* System Timer */
-       ldr     r0, =EXYNOS4_MCT_BASE
-       ldr     r1, =0x100
-       str     r1, [r0, #0x240]
-
-       /* Workaround: PMIC manual reset */
-       /* nPOWER: XEINT_23: GPX2[7] */
-       add     r0, r6, #0xC40                  @ EXYNOS4_GPIO_X2_OFFSET
-       ldr     r1, [r0, #0x0]
-       bic     r1, r1, #(0xf << 28)            @ 28 = 7 * 4-bit
-       orr     r1, r1, #(0x1 << 28)            @ Output
-       str     r1, [r0, #0x0]
-
-       ldr     r1, [r0, #0x4]
-       orr     r1, r1, #(1 << 7)               @ 7 = 7 * 1-bit
-       str     r1, [r0, #0x4]
-
-       /* init system clock */
-       bl      system_clock_init
-
-       /* Disable Watchdog */
-       ldr     r0, =EXYNOS4_WDT_BASE           @0x10060000
-       str     r5, [r0]
-
-       /* UART */
-       bl      uart_asm_init
-
-       /* PMU init */
-       bl      system_power_init
-
-/*     bl      tzpc_init
-*/
-
-       mov     lr, r11
-       mov     pc, lr
-       nop
-       nop
-       nop
-
-/*
- * uart_asm_init: Initialize UART's pins
- */
-uart_asm_init:
-       /*
-        * setup UART0-UART4 GPIOs (part1)
-        * GPA1CON[3] = I2C_3_SCL (3)
-        * GPA1CON[2] = I2C_3_SDA (3)
-        */
-       mov     r0, r7
-       ldr     r1, =0x22222222
-       str     r1, [r0, #0x00]                 @ EXYNOS4_GPIO_A0_OFFSET
-       ldr     r1, =0x00223322
-       str     r1, [r0, #0x20]                 @ EXYNOS4_GPIO_A1_OFFSET
-
-       /* UART_SEL GPY4[7] (part2) */
-       add     r0, r6, #0x1A0                  @ EXYNOS4_GPIO_Y4_OFFSET
-       ldr     r1, [r0, #0x0]
-       bic     r1, r1, #(0xf << 28)            @ 28 = 7 * 4-bit
-       orr     r1, r1, #(0x1 << 28)
-       str     r1, [r0, #0x0]
-
-       ldr     r1, [r0, #0x8]
-       bic     r1, r1, #(0x3 << 14)            @ 14 = 7 * 2-bit
-       orr     r1, r1, #(0x3 << 14)            @ Pull-up enabled
-       str     r1, [r0, #0x8]
-
-       ldr     r1, [r0, #0x4]
-       orr     r1, r1, #(1 << 7)               @ 7 = 7 * 1-bit
-       str     r1, [r0, #0x4]
-
-#if 0
-       ldr     r0, =EXYNOS4_UART_BASE
-       orr     r0, r0, #0x20000                @ UART2
-       mov     r1, #0x3
-       str     r1, [r0, #0x000]                @ ULCON
-       ldr     r1, =0x245
-       str     r1, [r0, #0x004]                @ UCON
-       mov     r1, #0x35
-       str     r1, [r0, #0x028]                @ UBRDIV
-       mov     r1, #0x4
-       str     r1, [r0, #0x02C]                @ UFRACVAL
-
-       mov     r2, #'W'
-       strb    r2, [r0, #0x020]                @ UTXH
-1001:
-       ldrb    r3, [r0, #0x010]                @ UTRSTAT
-       tst     r3, #(1 << 2)
-       beq     1001b
-#endif
-
-       mov     pc, lr
-       nop
-       nop
-       nop
-       .align  5
-
-system_clock_init:
-       ldr     r0, =EXYNOS4_CLOCK_BASE
-
-       /* CMU_CPU MUX / DIV */
-       ldr     r1, =0x01000000
-       ldr     r2, =0x14200                    @ CLK_SRC_CPU
-       str     r1, [r0, r2]
-       /* wait ?us */
-       mov     r1, #0x10000
-1:     subs    r1, r1, #1
-       bne     1b
-
-       /* CMU_DMC MUX / DIV */
-       ldr     r1, =0x00011000
-       ldr     r2, =0x10200                    @ CLK_SRC_DMC
-       str     r1, [r0, r2]
-       /* wait ?us */
-       mov     r1, #0x10000
-2:     subs    r1, r1, #1
-       bne     2b
-       ldr     r1, =0x00111113
-       ldr     r2, =0x10500                    @ CLK_DIV_DMC0
-       str     r1, [r0, r2]
-       ldr     r1, =0x05051013
-       ldr     r2, =0x10504                    @ CLK_DIV_DMC1
-       str     r1, [r0, r2]
-
-       /* CMU_TOP MUX / DIV */
-       ldr     r1, =0x00000000
-       ldr     r2, =0x0C210                    @ CLK_SRC_TOP0
-       str     r1, [r0, r2]
-       ldr     r1, =0x00001000
-       ldr     r2, =0x0C214                    @ CLK_SRC_TOP1
-       str     r1, [r0, r2]
-       /* wait ?us */
-       mov     r1, #0x10000
-3:     subs    r1, r1, #1
-       bne     3b
-       ldr     r1, =0x01205474
-       ldr     r2, =0x0C510                    @ CLK_DIV_TOP
-       str     r1, [r0, r2]
-
-       /* CMU_LEFTBUS MUX / DIV */
-       ldr     r1, =0x10
-       ldr     r2, =0x04200                    @ CLK_SRC_LEFTBUS
-       str     r1, [r0, r2]
-       /* wait ?us */
-       mov     r1, #0x10000
-4:     subs    r1, r1, #1
-       bne     4b
-       ldr     r1, =0x13
-       ldr     r2, =0x04500                    @ CLK_DIV_LEFTBUS
-       str     r1, [r0, r2]
-
-       /* CMU_RIGHTBUS MUX / DIV */
-       ldr     r1, =0x10
-       ldr     r2, =0x08200                    @ CLK_SRC_RIGHTBUS
-       str     r1, [r0, r2]
-       /* wait ?us */
-       mov     r1, #0x10000
-5:     subs    r1, r1, #1
-       bne     5b
-       ldr     r1, =0x13
-       ldr     r2, =0x08500                    @ CLK_DIV_RIGHTBUS
-       str     r1, [r0, r2]
-
-       /* MMC[0:1] */
-       ldr     r1, =0x000f000f                 /* 800(MPLL) / (15 + 1) */
-       ldr     r2, =0x0C544                    @ CLK_DIV_FSYS1
-       str     r1, [r0, r2]
-       /* wait for CLK_DIV_STAT_FSYS1 */
-       ldr     r2, =0x0C644
-       ldr     r3, =0x01010101 /* On changing bits */
-6:     ldr     r1, [r0, r2]
-       and     r1, r1, r3
-       cmp     r1, #0
-       bne     6b
-
-       /* MMC[2:3] */
-       ldr     r1, =0x000f000f                 /* 800(MPLL) / (15 + 1) */
-       ldr     r2, =0x0C548                    @ CLK_DIV_FSYS2
-       str     r1, [r0, r2]
-       /* wait for CLK_DIV_STAT_FSYS2 */
-       ldr     r2, =0x0C648
-       ldr     r3, =0x01010101 /* On changing bits */
-7:     ldr     r1, [r0, r2]
-       and     r1, r1, r3
-       cmp     r1, #0
-       bne     7b
-
-       /* MMC4 */
-       ldr     r1, =0x0003                     /* 800(MPLL) / (3 + 1) */
-       ldr     r2, =0x0C54C                    @ CLK_DIV_FSYS3
-       str     r1, [r0, r2]
-       /* wait for CLK_DIV_STAT_FSYS3 */
-       ldr     r2, =0x0C64C
-       ldr     r3, =0x00000101 /* On changing bits */
-8:     ldr     r1, [r0, r2]
-       and     r1, r1, r3
-       cmp     r1, #0
-       bne     8b
-
-       /* UART[0:5] */
-       ldr     r1, =0x774777
-       ldr     r2, =0x0C550                    @ CLK_DIV_PERIL0
-       str     r1, [r0, r2]
-       /* wait for CLK_DIV_STAT_PERIL0 */
-       ldr     r2, =0x0C650
-       ldr     r3, =0x00111111 /* On changing bits */
-9:     ldr     r1, [r0, r2]
-       and     r1, r1, r3
-       cmp     r1, #0
-       bne     9b
-
-       /* Set PLL locktime */
-       ldr     r1, =0x03E8
-       ldr     r2, =0x14000                    @ APLL_LOCK
-       str     r1, [r0, r2]
-       ldr     r1, =0x02F1
-       ldr     r2, =0x14008                    @ MPLL_LOCK
-       str     r1, [r0, r2]
-       ldr     r1, =0x2321
-       ldr     r2, =0x0C010                    @ EPLL_LOCK
-       str     r1, [r0, r2]
-       ldr     r1, =0x2321
-       ldr     r2, =0x0C020                    @ VPLL_LOCK
-       str     r1, [r0, r2]
-
-/* FIXME: check this */
-       /* SATA: SCLKMPLL(0), MMC[0:4]: SCLKMPLL(6) */
-       ldr     r1, =0x0066666
-       ldr     r2, =0x0C240                    @ CLK_SRC_FSYS
-       str     r1, [r0, r2]
-       /* UART[0:5], PWM: SCLKMPLL(6) */
-       ldr     r1, =0x6666666
-       ldr     r2, =0x0C250                    @ CLK_SRC_PERIL0_OFFSET
-       str     r1, [r0, r2]
-       /* wait ?us */
-       mov     r1, #0x10000
-10:    subs    r1, r1, #1
-       bne     10b
-/* FIXME END */
-
-#ifdef CONFIG_CLK_ARM_800
-       ldr     r1, =0x00133730
-       ldr     r2, =0x14500                    @ CLK_DIV_CPU0
-       str     r1, [r0, r2]
-       ldr     r1, =0x00000003
-       ldr     r2, =0x14504                    @ CLK_DIV_CPU1
-       str     r1, [r0, r2]
-       /* APLL */
-       ldr     r1, =0x00803800
-       ldr     r2, =0x14104                    @ APLL_CON1
-       str     r1, [r0, r2]
-       ldr     r1, =0x80640300                 @ 100:3:0
-       ldr     r2, =0x14100                    @ APLL_CON0
-       str     r1, [r0, r2]
-#endif
-#ifdef CONFIG_CLK_ARM_1000
-       ldr     r1, =0x00143730
-       ldr     r2, =0x14500                    @ CLK_DIV_CPU0
-       str     r1, [r0, r2]
-       ldr     r1, =0x00000004
-       ldr     r2, =0x14504                    @ CLK_DIV_CPU1
-       str     r1, [r0, r2]
-       /* APLL */
-       ldr     r1, =0x00803800
-       ldr     r2, =0x14104                    @ APLL_CON1
-       str     r1, [r0, r2]
-       ldr     r1, =0x807D0300                 @ 125:3:0
-       ldr     r2, =0x14100                    @ APLL_CON0
-       str     r1, [r0, r2]
-#endif
-#ifdef CONFIG_CLK_ARM_1200
-       ldr     r1, =0x00143730
-       ldr     r2, =0x14500                    @ CLK_DIV_CPU0
-       str     r1, [r0, r2]
-       ldr     r1, =0x00000005
-       ldr     r2, =0x14504                    @ CLK_DIV_CPU1
-       str     r1, [r0, r2]
-       /* APLL */
-       ldr     r1, =0x00803800
-       ldr     r2, =0x14104                    @ APLL_CON1
-       str     r1, [r0, r2]
-       ldr     r1, =0x80960300                 @ 150:3:0
-       ldr     r2, =0x14100                    @ APLL_CON0
-       str     r1, [r0, r2]
-#endif
-
-       /* check C2C_CTRL enable bit */
-       ldr     r3, =EXYNOS4_POWER_BASE
-       ldr     r1, [r3, #0x24]
-       and     r1, r1, #1
-       cmp     r1, #0
-       bne     skip_mpll
-
-#ifdef CONFIG_CLK_BUS_DMC_165_330
-       /* MPLL */
-       ldr     r1, =0x00803800
-       ldr     r2, =0x1010C                    @ MPLL_CON1
-       str     r1, [r0, r2]
-       ldr     r1, =0x81160501                 @ 667MHz (278:5:1)
-       ldr     r2, =0x10108                    @ MPLL_CON0
-       str     r1, [r0, r2]
-#endif
-#ifdef CONFIG_CLK_BUS_DMC_200_400
-       /* MPLL */
-       ldr     r1, =0x00803800
-       ldr     r2, =0x1010C                    @ MPLL_CON1
-       str     r1, [r0, r2]
-       ldr     r1, =0x80640300                 @ 800MHz (100:3:0)
-       ldr     r2, =0x10108                    @ MPLL_CON0
-       str     r1, [r0, r2]
-#endif
-skip_mpll:
-
-       /* EPLL */
-       ldr     r1, =0x00000080
-       ldr     r2, =0x0C118                    @ EPLL_CON2
-       str     r1, [r0, r2]
-       ldr     r1, =0x66010000
-       ldr     r2, =0x0C114                    @ EPLL_CON1
-       str     r1, [r0, r2]
-       ldr     r1, =0x80400203                 @ 96MHz (64:2:3)
-       ldr     r2, =0x0C110                    @ EPLL_CON0
-       str     r1, [r0, r2]
-
-       /* VPLL */
-       ldr     r1, =0x00000080
-       ldr     r2, =0x0C128                    @ VPLL_CON2
-       str     r1, [r0, r2]
-       ldr     r1, =0x66010000
-       ldr     r2, =0x0C124                    @ VPLL_CON1
-       str     r1, [r0, r2]
-       ldr     r1, =0x80480203                 @ 108MHz (72:2:3)
-       ldr     r2, =0x0C120                    @ VPLL_CON0
-       str     r1, [r0, r2]
-
-       /* wait ?us */
-       mov     r1, #0x40000
-11:    subs    r1, r1, #1
-       bne     11b
-
-       ldr     r1, =0x01000001
-       ldr     r2, =0x14200                    @ CLK_SRC_CPU
-       str     r1, [r0, r2]
-
-       ldr     r1, =0x00011000
-       ldr     r2, =0x10200                    @ CLK_SRC_DMC
-       str     r1, [r0, r2]
-
-       ldr     r1, =0x00000110
-       ldr     r2, =0x0C210                    @ CLK_SRC_TOP0
-       str     r1, [r0, r2]
-       ldr     r1, =0x01111000
-       ldr     r2, =0x0C214                    @ CLK_SRC_TOP1
-       str     r1, [r0, r2]
-
-       /* wait ?us */
-       mov     r1, #0x10000
-12:    subs    r1, r1, #1
-       bne     12b
-
-#if 0
-       /*
-        * SMMUJPEG[11], JPEG[6], CSIS1[5]              : 0111 1001
-        * Turn off all
-        */
-       ldr     r1, =0xFFF80000
-       ldr     r2, =0x0C920                    @ CLK_GATE_IP_CAM
-       str     r1, [r0, r2]
-
-       /* Turn off all */
-       ldr     r1, =0xFFFFFFC0
-       ldr     r2, =0x0C924                    @ CLK_GATE_IP_VP
-       str     r1, [r0, r2]
-
-       /* Turn off all */
-       ldr     r1, =0xFFFFFFFE
-       ldr     r2, =0x0C928                    @ CLK_GATE_IP_MFC
-       str     r1, [r0, r2]
-
-       /* Turn off all */
-       ldr     r1, =0xFFFFFFFE
-       ldr     r2, =0x0C92C                    @ CLK_GATE_IP_G3D
-       str     r1, [r0, r2]
-
-       /* Turn off all */
-       ldr     r1, =0xFFFFFC00
-       ldr     r2, =0x0C930                    @ CLK_GATE_IP_IMAGE
-       str     r1, [r0, r2]
-
-       /* DSIM0[3], MDNIE0[2], MIE0[1]                 : 0001 */
-       ldr     r1, =0xFFFFFFF1
-       ldr     r2, =0x0C934                    @ CLK_GATE_IP_LCD0
-       str     r1, [r0, r2]
-
-       /* Turn off all */
-       ldr     r1, =0xFFFFFFC0
-       ldr     r2, =0x0C938                    @ CLK_GATE_IP_LCD1
-       str     r1, [r0, r2]
-
-       /*
-        * SMMUPCIE[18], NFCON[16]                      : 1111 1010
-        * ONENAND[15], PCIE[14], SATA[10], SDMMC43[9:8]: 0011 1000
-        * SDMMC1[6], TSI[4], SATAPHY[3], PCIEPHY[2]    : 1010 0011
-        */
-       ldr     r1, =0xFFFA38A3
-       ldr     r2, =0x0C940                    @ CLK_GATE_IP_FSYS
-       str     r1, [r0, r2]
-
-       /* Turn off all */
-       ldr     r1, =0xFFFFFFFE
-       ldr     r2, =0x0C94C                    @ CLK_GATE_IP_GPS
-       str     r1, [r0, r2]
-
-       /*
-        * AC97[27], SPDIF[26], SLIMBUS[25]             : 1111 0001
-        * I2C2[8]                                      : 1111 1110
-        */
-       ldr     r1, =0xF1FFFEFF
-       ldr     r2, =0x0C950                    @ CLK_GATE_IP_PERIL
-       str     r1, [r0, r2]
-
-       /*
-        * KEYIF[16]                                    : 1111 1110
-        */
-       ldr     r1, =0xFFFEFFFF
-       ldr     r2, =0x0C960                    @ CLK_GATE_IP_PERIR
-       str     r1, [r0, r2]
-
-       /* GPS[7], LCD1[5], G3D[3], MFC[2], TV[1]       : 0101 0001 */
-       ldr     r1, =0xFFFFFF51
-       ldr     r2, =0x0C970                    @ CLK_GATE_BLOCK
-       str     r1, [r0, r2]
-#endif
-       mov     pc, lr
-       nop
-       nop
-       nop
-
-system_power_init:
-       ldr     r0, =EXYNOS4_POWER_BASE         @ 0x10020000
-
-       ldr     r2, =0x330C                     @ PS_HOLD_CONTROL
-       ldr     r1, [r0, r2]
-       orr     r1, r1, #(0x3 << 8)             @ Data High, Output En
-       str     r1, [r0, r2]
-
-       mov     pc, lr
-       nop
-       nop
-       nop
-
-tzpc_init:
-       ldr     r0, =0x10110000
-       mov     r1, #0x0
-       str     r1, [r0]
-       mov     r1, #0xff
-       str     r1, [r0, #0x0804]
-       str     r1, [r0, #0x0810]
-       str     r1, [r0, #0x081C]
-       str     r1, [r0, #0x0828]
-
-       ldr     r0, =0x10120000
-       str     r1, [r0, #0x0804]
-       str     r1, [r0, #0x0810]
-       str     r1, [r0, #0x081C]
-       str     r1, [r0, #0x0828]
-
-       ldr     r0, =0x10130000
-       str     r1, [r0, #0x0804]
-       str     r1, [r0, #0x0810]
-       str     r1, [r0, #0x081C]
-       str     r1, [r0, #0x0828]
-
-       ldr     r0, =0x10140000
-       str     r1, [r0, #0x0804]
-       str     r1, [r0, #0x0810]
-       str     r1, [r0, #0x081C]
-       str     r1, [r0, #0x0828]
-
-       ldr     r0, =0x10150000
-       str     r1, [r0, #0x0804]
-       str     r1, [r0, #0x0810]
-       str     r1, [r0, #0x081C]
-       str     r1, [r0, #0x0828]
-
-       mov     pc, lr
diff --git a/board/samsung/trats2/trats2.c b/board/samsung/trats2/trats2.c
deleted file mode 100644 (file)
index fc557b6..0000000
+++ /dev/null
@@ -1,953 +0,0 @@
-/*
- * Copyright (c) 2000 - 2011 Samsung Electronics Co., Ltd. All rights reserved.
- * Sanghee Kim <sh0130.kim@samsung.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <i2c.h>
-#include <lcd.h>
-#include <spi.h>
-#include <swi.h>
-#include <asm/io.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/mmc.h>
-#include <asm/arch/power.h>
-#include <asm/arch/clk.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/mipi_dsim.h>
-#include <asm/arch/regs-fb.h>
-#include <mmc.h>
-#include <fat.h>
-#include <fbutils.h>
-#include <max77686.h>
-#include <max77693.h>
-#include <mobile/misc.h>
-#include <mobile/fs_type_check.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static struct exynos4_gpio_part1 *gpio1;
-static struct exynos4_gpio_part2 *gpio2;
-
-static unsigned int board_rev = -1;
-static unsigned int board_type = -1;
-static int boot_mode = -1;
-
-enum {
-       BOARD_M0_PRXM,
-       BOARD_M0_REAL,
-};
-
-static inline int board_is_m0_prxm(void)
-{
-       return board_type == BOARD_M0_PRXM;
-}
-
-static inline int board_is_m0_real(void)
-{
-       return board_type == BOARD_M0_REAL;
-}
-
-static inline int board_is_m0(void)
-{
-       return (board_is_m0_prxm() || board_is_m0_real());
-}
-
-enum {
-       I2C_0, I2C_1, I2C_2, I2C_3,
-       I2C_4, I2C_5, I2C_6, I2C_7,
-       I2C_8, I2C_9, I2C_10, I2C_NUM,
-};
-
-/* i2c7 (MAX77686)     SDA: GPD0[2] SCL: GPD0[3] */
-static struct i2c_gpio_bus_data i2c_7 = {
-       .sda_pin = 2,
-       .scl_pin = 3,
-};
-
-/* i2c9 (IF PMIC)      SDA: GPM2[0] SCL: GPM2[1] */
-static struct i2c_gpio_bus_data i2c_9 = {
-       .sda_pin = 0,
-       .scl_pin = 1,
-};
-
-/* i2c10 (Fuel Gauge)  SDA: GPF1[5] SCL: GPF1[4] */
-static struct i2c_gpio_bus_data i2c_10 = {
-       .sda_pin = 5,
-       .scl_pin = 4,
-};
-
-static struct i2c_gpio_bus i2c_gpio[I2C_NUM];
-
-static const char * const pcb_rev_m0[] = {
-       "M0_PROXIMA_REV0.1_1125",
-       "unknown",
-       "unknown",
-       "M0_PROXIMA_REV0.0_1114",
-       "unknown",
-       "unknown",
-       "unknown",
-       "M0_REAL_REV0.6_120119",
-       "M0_REAL_REV0.6_A",
-       "unknown",
-       "unknown",
-       "M0_REAL_REV1.0_120302",
-       "M0_REAL_REV1.1_2nd_120413",
-       "unknown",
-       "unknown"
-};
-
-int check_home_key(void);
-
-static void check_hw_revision(void)
-{
-       int hwrev = 0;
-       int i;
-
-       /* HW_REV[0:3]: GPM1[2:5] */
-       for (i = 2; i < 6; i++) {
-               gpio_cfg_pin(&gpio2->m1, i, GPIO_INPUT);
-               gpio_set_pull(&gpio2->m1, i, GPIO_PULL_NONE);
-       }
-
-       udelay(1);
-
-       for (i = 2; i < 6; i++) {
-               hwrev |= (gpio_get_value(&gpio2->m1, i) << (i - 2));
-               udelay(1);
-       }
-
-       board_rev = hwrev;
-}
-
-static void check_board_type(void)
-{
-       /*
-        * BOARD  | F2.4    | F2.7
-        * ---------------------------------------
-        * M0     | NC      | s_led_sda
-        */
-
-       gpio_set_pull(&gpio1->f2, 4, GPIO_PULL_NONE);
-       gpio_set_pull(&gpio1->f2, 7, GPIO_PULL_NONE);
-
-       udelay(1);
-
-       if (!gpio_get_value(&gpio1->f2, 4)) {
-               if (gpio_get_value(&gpio1->f2, 7)) {
-                       if (board_rev >= 7)
-                               board_type = BOARD_M0_REAL;
-                       else
-                               board_type = BOARD_M0_PRXM;
-               }
-       }
-}
-
-static void show_hw_revision(void)
-{
-       printf("HW Revision:\t0x%x\n", board_rev);
-
-       if (board_is_m0())
-               printf("PCB Revision:\t%s\n",
-                       pcb_rev_m0[board_rev & 0xf]);
-       else
-               printf("PCB Revision:\tunknown\n");
-}
-
-u32 get_board_rev(void)
-{
-       return board_rev;
-}
-
-void get_rev_info(char *rev_info)
-{
-       if (board_is_m0())
-               sprintf(rev_info, "HW Revision: 0x%x (%s)\n",
-                       board_rev, pcb_rev_m0[board_rev & 0xf]);
-       else
-               sprintf(rev_info, "HW Revision: 0x%x (%s)\n",
-                       board_rev, "unknown");
-}
-
-static void board_external_gpio_init(void)
-{
-       /*
-        * some pins which in alive block are connected with external pull-up
-        * but it's default setting is pull-down.
-        * if that pin set as input then that floated
-        */
-
-       gpio_set_pull(&gpio2->x0, 2, GPIO_PULL_NONE);   /* PS_ALS_INT */
-       gpio_set_pull(&gpio2->x0, 4, GPIO_PULL_NONE);   /* TSP_nINT */
-       gpio_set_pull(&gpio2->x0, 7, GPIO_PULL_NONE);   /* AP_PMIC_IRQ */
-       gpio_set_pull(&gpio2->x1, 5, GPIO_PULL_NONE);   /* IF_PMIC_IRQ */
-       gpio_set_pull(&gpio2->x2, 0, GPIO_PULL_NONE);   /* VOL_UP */
-       gpio_set_pull(&gpio2->x2, 1, GPIO_PULL_NONE);   /* VOL_DOWN */
-       gpio_set_pull(&gpio2->x2, 3, GPIO_PULL_NONE);   /* FUEL_ALERT */
-       gpio_set_pull(&gpio2->x2, 4, GPIO_PULL_NONE);   /* ADC_INT */
-       gpio_set_pull(&gpio2->x2, 7, GPIO_PULL_NONE);   /* nPOWER */
-       gpio_set_pull(&gpio2->x3, 0, GPIO_PULL_NONE);   /* WPC_INT */
-       gpio_set_pull(&gpio2->x3, 5, GPIO_PULL_NONE);   /* OK_KEY */
-       gpio_set_pull(&gpio2->x3, 7, GPIO_PULL_NONE);   /* HDMI_HPD */
-}
-
-#ifdef CONFIG_SYS_I2C_INIT_BOARD
-void i2c_init_board(void)
-{
-       max77686_bus_init(I2C_7);
-       max77693_pmic_bus_init(I2C_9);
-       max77693_muic_bus_init(I2C_9);
-       max77693_fg_bus_init(I2C_10);
-
-       i2c_gpio[I2C_0].bus = NULL;
-       i2c_gpio[I2C_1].bus = NULL;
-       i2c_gpio[I2C_2].bus = NULL;
-       i2c_gpio[I2C_3].bus = NULL;
-       i2c_gpio[I2C_4].bus = NULL;
-       i2c_gpio[I2C_5].bus = NULL;
-       i2c_gpio[I2C_6].bus = NULL;
-       i2c_gpio[I2C_7].bus = &i2c_7;
-       i2c_gpio[I2C_8].bus = NULL;
-       i2c_gpio[I2C_9].bus = &i2c_9;
-       i2c_gpio[I2C_10].bus = &i2c_10;
-
-       i2c_gpio[I2C_7].bus->gpio_base = (unsigned int)&gpio1->d0;
-       i2c_gpio[I2C_9].bus->gpio_base = (unsigned int)&gpio2->m2;
-       i2c_gpio[I2C_10].bus->gpio_base = (unsigned int)&gpio1->f1;
-
-       i2c_gpio_init(i2c_gpio, I2C_NUM, I2C_9);
-}
-#endif
-
-int board_early_init_f(void)
-{
-       gpio1 = (struct exynos4_gpio_part1 *)EXYNOS4_GPIO_PART1_BASE;
-       gpio2 = (struct exynos4_gpio_part2 *)EXYNOS4_GPIO_PART2_BASE;
-
-       check_hw_revision();
-       check_board_type();
-       board_external_gpio_init();
-
-#ifdef CONFIG_OFFICIAL_REL
-       if (!check_home_key())
-               gd->flags |= GD_FLG_DISABLE_CONSOLE;
-#endif
-
-       return 0;
-}
-
-int board_init(void)
-{
-       gpio1 = (struct exynos4_gpio_part1 *)EXYNOS4_GPIO_PART1_BASE;
-       gpio2 = (struct exynos4_gpio_part2 *)EXYNOS4_GPIO_PART2_BASE;
-
-       gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
-       if (board_is_m0())
-               gd->bd->bi_arch_number = MACH_TYPE_SMDK4412 + 1;
-       else
-               gd->bd->bi_arch_number = MACH_TYPE_SMDK4412;
-
-       /* Check reboot reason */
-       boot_mode = get_boot_mode();
-       /* Set frame buffer */
-       switch (boot_mode) {
-       case LOCKUP_RESET:
-       case DUMP_REBOOT:
-       case DUMP_FORCE_REBOOT:
-               gd->fb_base = CONFIG_SYS_FB2_ADDR;
-               lcd_base = (void *)(gd->fb_base);
-               break;
-       default:
-               break;
-       }
-#ifdef CONFIG_SBOOT
-       /* workaround: clear INFORM4..5 */
-       writel(0, CONFIG_INFO_ADDRESS);
-       writel(0, CONFIG_INFO_ADDRESS + 4);
-#endif
-       return 0;
-}
-
-static void init_battery(void);
-static void init_pmic(void);
-
-int dram_init(void)
-{
-       u32 size_mb = exynos_get_dram_size();
-
-       gd->ram_size = size_mb << 20;
-
-       init_pmic();
-       return 0;
-}
-
-void dram_init_banksize(void)
-{
-       int i;
-       u32 size_mb = exynos_get_dram_size();
-
-       gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-       gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-       gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
-       gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
-       gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
-       gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
-       gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
-       gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
-#if defined(CONFIG_TRUSTZONE)
-       gd->bd->bi_dram[3].size -= CONFIG_TRUSTZONE_RESERVED_DRAM;
-#endif
-}
-
-int check_exit_key(void)
-{
-       static int count = 0;
-
-       if (max77686_check_pwrkey())
-               count++;
-
-       if (count >= 3) {
-               count = 0;
-               return 1;
-       }
-
-       return 0;
-}
-
-int check_volume_up(void)
-{
-       if (board_is_m0_real())
-               return !(gpio_get_value(&gpio2->x2, 2));
-       else
-               return !(gpio_get_value(&gpio1->j1, 1));
-}
-
-int check_volume_down(void)
-{
-       if (board_is_m0_real())
-               return !(gpio_get_value(&gpio2->x3, 3));
-       else
-               return !(gpio_get_value(&gpio1->j1, 2));
-}
-
-int check_home_key(void)
-{
-       return 1;
-}
-
-static void check_keypad(void)
-{
-       unsigned int power_key;
-
-       power_key = max77686_check_pwron_pwrkey();
-       if (power_key) {
-               if (check_volume_down())
-                       setenv("bootcmd", "usbdown");
-       }
-}
-
-static void print_msg(char *msg)
-{
-#ifdef CONFIG_LCD
-       if (!board_no_lcd_support())
-               fb_printf(msg);
-#endif
-       puts(msg);
-}
-
-/*
- * PMIC / MUIC
- */
-
-static unsigned int battery_soc;       /* state of charge in % */
-static unsigned int battery_uV;                /* in micro volts */
-static int ta_usb_connected;           /* ta: 1, usb: 2 */
-
-static void init_pmic(void)
-{
-       if (max77686_rtc_init())
-               return;
-
-       if (max77686_init())
-               return;
-
-       /* BUCK/LDO Output Voltage */
-       max77686_set_ldo_voltage(21, 2800000);          /* LDO21 VTF_2.8V */
-       max77686_set_ldo_voltage(23, 3300000);          /* LDO23 TSP_AVDD_3.3V */
-
-       if ((board_is_m0() && (board_rev != 0x3)))
-               max77686_set_ldo_voltage(24, 1800000);  /* LDO24 TSP_VDD_1.8V */
-
-       /* BUCK/LDO Output Mode */
-       max77686_set_buck_mode(1, OPMODE_STANDBY);      /* BUCK1 VMIF_1.1V_AP */
-       max77686_set_buck_mode(2, OPMODE_ON);           /* BUCK2 VARM_1.0V_AP */
-       max77686_set_buck_mode(3, OPMODE_ON);           /* BUCK3 VINT_1.0V_AP */
-       max77686_set_buck_mode(4, OPMODE_ON);           /* BUCK4 VG3D_1.0V_AP */
-       max77686_set_buck_mode(5, OPMODE_ON);           /* BUCK5 VMEM_1.2V_AP */
-       max77686_set_buck_mode(6, OPMODE_ON);           /* BUCK6 VCC_SUB_1.35V */
-       max77686_set_buck_mode(7, OPMODE_ON);           /* BUCK7 VCC_SUB_2.0V */
-       max77686_set_buck_mode(8, OPMODE_OFF);          /* BUCK8 VMEM_VDDF_2.85V */
-       max77686_set_buck_mode(9, OPMODE_OFF);          /* BUCK9 CAM_ISP_CORE_1.2V */
-
-       max77686_set_ldo_mode(1, OPMODE_LPM);           /* LDO1 VALIVE_1.0V_AP */
-       max77686_set_ldo_mode(2, OPMODE_STANDBY);       /* LDO2 VM1M2_1.2V_AP */
-       max77686_set_ldo_mode(3, OPMODE_LPM);           /* LDO3 VCC_1.8V_AP */
-       max77686_set_ldo_mode(4, OPMODE_LPM);           /* LDO4 VCC_2.8V_AP */
-
-       if (board_is_m0_real())
-               max77686_set_ldo_mode(5, OPMODE_OFF);   /* VCC_1.8V_IO has removed from rev06 */
-       else
-               max77686_set_ldo_mode(5, OPMODE_LPM);   /* LDO5 VCC_1.8V_IO */
-
-       max77686_set_ldo_mode(6, OPMODE_STANDBY);       /* LDO6 VMPLL_1.0V_AP */
-       max77686_set_ldo_mode(7, OPMODE_STANDBY);       /* LDO7 VPLL_1.0V_AP */
-       max77686_set_ldo_mode(8, OPMODE_LPM);           /* LDO8 VMIPI_1.0V_AP */
-       max77686_set_ldo_mode(9, OPMODE_OFF);           /* LDO9 CAM_ISP_MIPI_1.2V */
-       max77686_set_ldo_mode(10, OPMODE_LPM);          /* LDO10 VMIPI_1.8V_AP */
-       max77686_set_ldo_mode(11, OPMODE_STANDBY);      /* LDO11 VABB1_1.8V_AP */
-       max77686_set_ldo_mode(12, OPMODE_LPM);          /* LDO12 VUOTG_3.0V_AP */
-       max77686_set_ldo_mode(13, OPMODE_OFF);  /* LDO13 VC2C_1.8V_AP */
-       max77686_set_ldo_mode(14, OPMODE_STANDBY);      /* LDO14 VABB02_1.8V_AP */
-       max77686_set_ldo_mode(15, OPMODE_STANDBY);      /* LDO15 VHSIC_1.0V_AP */
-       max77686_set_ldo_mode(16, OPMODE_STANDBY);      /* LDO16 VHSIC_1.8V_AP */
-       max77686_set_ldo_mode(17, OPMODE_OFF);          /* LDO17 CAM_SENSOR_CORE_1.2V */
-       max77686_set_ldo_mode(18, OPMODE_OFF);          /* LDO18 CAM_ISP_SEN_IO_1.8V */
-       max77686_set_ldo_mode(19, OPMODE_OFF);          /* LDO19 VT_CAM_1.8V */
-       max77686_set_ldo_mode(20, OPMODE_ON);           /* LDO20 VDDQ_PRE_1.8V */
-       max77686_set_ldo_mode(21, OPMODE_OFF);          /* LDO21 VTF_2.8V */
-       max77686_set_ldo_mode(22, OPMODE_OFF);          /* LDO22 VMEM_VDD_2.8V */
-       max77686_set_ldo_mode(23, OPMODE_OFF);          /* LDO23 TSP_AVDD_3.3V */
-       max77686_set_ldo_mode(24, OPMODE_OFF);          /* LDO24 TSP_VDD_1.8V */
-       max77686_set_ldo_mode(25, OPMODE_OFF);          /* LDO25 VCC_3.3V_LCD */
-       max77686_set_ldo_mode(26, OPMODE_OFF);          /* LDO26 VCC_3.0V_MOTOR */
-
-       /* 32KHZ: Enable low jitter mode and active P32KH, 32KHZCP,32KHZAP */
-       max77686_set_32khz(MAX77686_EN32KHZ_DFLT);
-
-       show_pwron_source(NULL);
-}
-
-static void init_muic(void)
-{
-       max77693_init();
-}
-
-int pmic_has_battery(void)
-{
-       return max77693_charger_detbat();
-}
-
-static void init_battery(void)
-{
-       max77693_fg_init(BATTERY_SDI_2100, ta_usb_connected);
-}
-
-static void check_battery(void)
-{
-       int pwron_acokb;
-
-       max77693_fg_probe();
-       battery_soc = max77693_fg_get_soc();
-       battery_uV = max77693_fg_get_vcell();
-
-       /* When JIG is connected, it may skip */
-       if (battery_uV > 3850000)
-               return;
-
-       /* check power-off condition */
-       if (ta_usb_connected) {
-               if (!pmic_has_battery()) {
-                       printf("Battery is not detected, power off\n");
-                       power_off();
-               }
-       } else {
-               if (battery_uV < 3400000 || battery_soc < 1) {
-                       puts("Please charge the battery, power off.\n");
-                       power_off();
-               }
-       }
-}
-
-static void check_ta_usb(void)
-{
-       unsigned char pwron = max77686_get_reg_pwron();
-
-       if (ta_usb_connected)
-               return;
-
-       /* check whether ta or usb cable have been attached */
-       if (pwron == 0x04) {
-               writel(0, EXYNOS4_WDT_BASE);
-               max77686_rtc_disable_wtsr_smpl();
-               power_off();
-       }
-}
-
-static int init_charger(void)
-{
-       if (!pmic_has_battery())
-               return -1;
-
-       max77686_clear_irq();
-
-       switch (ta_usb_connected) {
-       case CHARGER_TA:
-               run_command("max77693 charger start 650", 0);
-               break;
-       case CHARGER_TA_500:
-               run_command("max77693 charger start 500", 0);
-               break;
-       case CHARGER_UNKNOWN:
-               /* for cable which don't officially support, fall through */
-       case CHARGER_USB:
-               run_command("max77693 charger start 475", 0);
-               break;
-       case CHARGER_NO:
-               run_command("max77693 charger stop", 0);
-               break;
-       default:
-               printf("charger: not supported mode (%d)\n", ta_usb_connected);
-               return 1;
-       }
-
-       return 0;
-}
-
-void board_muic_gpio_control(int output, int path)
-{
-       /*
-        * output - 0:usb, 1:uart
-        * path   - 0:cp,  1:ap
-        */
-       if (output)
-               /* UART_SEL (0: CP_TXD/RDX, 1: AP_TXD/RDX) */
-               if (path)
-                       gpio_direction_output(&gpio1->f2, 3, 1);
-               else
-                       gpio_direction_output(&gpio1->f2, 3, 0);
-       else
-               /* USB_SEL (0: IF_TXD/RXD, 1:CP_D+/D-) */
-               if (path)
-                       gpio_direction_output(&gpio1->j0, 1, 0);
-               else
-                       gpio_direction_output(&gpio1->j0, 1, 1);
-}
-
-int get_ta_usb_status(void)
-{
-       return ta_usb_connected;
-}
-
-/*
- * LCD
- */
-
-int board_no_lcd_support(void)
-{
-       return 0;
-}
-
-#ifdef CONFIG_LCD
-int s5p_no_lcd_support(void)
-{
-       return 0;
-}
-
-void fimd_clk_set(void)
-{
-       struct exynos4_clock *clk =
-                   (struct exynos4_clock *)samsung_get_base_clock();
-       unsigned int cfg = 0;
-
-       cfg = readl(EXYNOS4_LCDBLK_CFG);
-       cfg |= (1 << 1);
-       writel(cfg, EXYNOS4_LCDBLK_CFG);
-
-       /* set lcd src clock */
-       cfg = readl(&clk->src_lcd);
-       cfg &= ~(0xf);
-       cfg |= 0x6;
-       writel(cfg, &clk->src_lcd);
-
-       /* set fimd ratio */
-       cfg = readl(&clk->div_lcd);
-       cfg &= ~(0xf);
-       cfg |= 0x1;
-       writel(cfg, &clk->div_lcd);
-}
-
-static int mipi_phy_control(int on, u32 reset)
-{
-       unsigned int addr = EXYNOS4_MIPI_PHY0_CONTROL;
-       u32 cfg;
-
-       cfg = readl(addr);
-       cfg = on ? (cfg | reset) : (cfg & ~reset);
-       writel(cfg, addr);
-
-       if (on)
-               cfg |= S5P_MIPI_PHY_ENABLE;
-       else if (!(cfg & (S5P_MIPI_PHY_SRESETN |
-                           S5P_MIPI_PHY_MRESETN) & ~reset)) {
-               cfg &= ~S5P_MIPI_PHY_ENABLE;
-       }
-
-       writel(cfg, addr);
-
-       return 0;
-}
-
-static struct mipi_dsim_config dsim_config = {
-       .e_interface            = DSIM_VIDEO,
-       .e_virtual_ch           = DSIM_VIRTUAL_CH_0,
-       .e_pixel_format         = DSIM_24BPP_888,
-       .e_burst_mode           = DSIM_BURST_SYNC_EVENT,
-       .e_no_data_lane         = DSIM_DATA_LANE_4,
-       .e_byte_clk             = DSIM_PLL_OUT_DIV8,
-       .hfp                    = 1,
-
-       .p                      = 3,
-       .m                      = 120,
-       .s                      = 1,
-
-       /* D-PHY PLL stable time spec :min = 200usec ~ max 400usec */
-       .pll_stable_time        = 500,
-
-       /* escape clk : 10MHz */
-       .esc_clk                = 20 * 1000000,
-
-       /* stop state holding counter after bta change count 0 ~ 0xfff */
-       .stop_holding_cnt       = 0x7ff,
-       /* bta timeout 0 ~ 0xff */
-       .bta_timeout            = 0xff,
-       /* lp rx timeout 0 ~ 0xffff */
-       .rx_timeout             = 0xffff,
-};
-
-static struct s5p_platform_mipi_dsim dsim_platform_data = {
-       .lcd_panel_info = NULL,
-       .dsim_config = &dsim_config,
-};
-
-static struct mipi_dsim_lcd_device mipi_lcd_device = {
-       .name   = "s6e8ax0",
-       .panel_id = "ams480gyxx-sm2",
-       .id     = -1,
-       .bus_id = 0,
-       .platform_data  =(void *)&dsim_platform_data,
-};
-
-static int mipi_power(void)
-{
-       /* LDO8 VMIPI_1.0V_AP */
-       max77686_set_ldo_mode(8, OPMODE_ON);
-       /* LDO10 VMIPI_1.8V_AP */
-       max77686_set_ldo_mode(10, OPMODE_ON);
-       return 0;
-}
-
-static int lcd_power(void)
-{
-       if (board_is_m0() && (board_rev != 0x3)) {
-               /* LCD_2.2V_EN: GPC0[1] */
-               gpio_set_pull(&gpio1->c0, 1, GPIO_PULL_UP);
-               gpio_direction_output(&gpio1->c0, 1, 1);
-       } else {
-               /* LDO24 LCD_VDD_2.2V */
-               max77686_set_ldo_voltage(24, 2200000);
-               max77686_set_ldo_mode(24, OPMODE_LPM);
-       }
-
-       /* LDO25 VCC_3.1V_LCD */
-       max77686_set_ldo_voltage(25, 3100000);
-       max77686_set_ldo_mode(25, OPMODE_LPM);
-
-       return 0;
-}
-
-static int lcd_reset(void)
-{
-       /* reset lcd */
-       gpio_direction_output(&gpio1->f2, 1, 0);
-       udelay(10);
-       gpio_set_value(&gpio1->f2, 1, 1);
-
-       return 0;
-}
-extern void s6e8ax0_init(void);
-extern void s5p_set_dsim_platform_data(struct s5p_platform_mipi_dsim *dsim_pd);
-
-void init_panel_info(vidinfo_t *vid)
-{
-       vid->board_logo = 1;
-
-       vid->vl_freq    = 60;
-       vid->vl_col     = 720;
-       vid->vl_row     = 1280;
-       vid->vl_width   = 720;
-       vid->vl_height  = 1280;
-       vid->vl_clkp    = CONFIG_SYS_HIGH;
-       vid->vl_hsp     = CONFIG_SYS_LOW;
-       vid->vl_vsp     = CONFIG_SYS_LOW;
-       vid->vl_dp      = CONFIG_SYS_LOW;
-
-       vid->vl_bpix    = 32;
-       vid->dual_lcd_enabled = 0;
-
-       /* s6e8ax0 Panel */
-       vid->vl_hspw    = 5;
-       vid->vl_hbpd    = 10;
-       vid->vl_hfpd    = 10;
-
-       vid->vl_vspw    = 2;
-       vid->vl_vbpd    = 1;
-       vid->vl_vfpd    = 13;
-       vid->vl_cmd_allow_len = 0xf;
-
-       vid->cfg_gpio = NULL;
-       vid->backlight_on = NULL;
-       vid->lcd_power_on = lcd_power;  /* lcd_power_on in mipi dsi driver */
-       vid->reset_lcd = lcd_reset;
-
-       vid->init_delay = 0;
-       vid->power_on_delay = 25;
-       vid->reset_delay = 0;
-       vid->interface_mode = FIMD_RGB_INTERFACE;
-
-       strcpy(dsim_platform_data.lcd_panel_name, mipi_lcd_device.name);
-       dsim_platform_data.lcd_power = lcd_power;
-       dsim_platform_data.mipi_power = mipi_power;
-       dsim_platform_data.phy_enable = mipi_phy_control;
-       dsim_platform_data.lcd_panel_info = (void *)vid;
-       s5p_mipi_dsi_register_lcd_device(&mipi_lcd_device);
-
-       s6e8ax0_init();
-
-       s5p_set_dsim_platform_data(&dsim_platform_data);
-
-       setenv("lcdinfo", "lcd=s6e8ax0");
-}
-
-#include <mobile/logo_rgb16_hd720_portrait.h>
-#include <mobile/charging_rgb565_hd720_portrait.h>
-#include <mobile/download_rgb16_wvga_portrait.h>
-
-logo_info_t logo_info;
-
-static void init_logo_info(void)
-{
-       int x_ofs = (720 - 480) / 2;
-       int y_ofs = (1280 - 800) / 2;
-
-       logo_info.logo_top.img = logo_top_hd720;
-       logo_info.logo_top.x = logo_top_x_hd720;
-       logo_info.logo_top.y = logo_top_y_hd720;
-       logo_info.logo_bottom.img = logo_bottom_hd720;
-       logo_info.logo_bottom.x = logo_bottom_x_hd720;
-       logo_info.logo_bottom.y = logo_bottom_y_hd720;
-
-       logo_info.charging.img = charging_animation_loading_hd720;
-       logo_info.charging.x = charging_x_hd720;
-       logo_info.charging.y = charging_y_hd720;
-
-       logo_info.download_logo.img = download_image;
-       logo_info.download_logo.x = 205 + x_ofs;
-       logo_info.download_logo.y = 272 + y_ofs;
-       logo_info.download_text.img = download_text;
-       logo_info.download_text.x = 90 + x_ofs;
-       logo_info.download_text.y = 360 + y_ofs;
-
-       logo_info.download_fail_logo.img = download_noti_image;
-       logo_info.download_fail_logo.x = 196 + x_ofs;
-       logo_info.download_fail_logo.y = 270 + y_ofs;
-       logo_info.download_fail_text.img = download_fail_text;
-       logo_info.download_fail_text.x = 70 + x_ofs;
-       logo_info.download_fail_text.y = 370 + y_ofs;
-
-       logo_info.download_bar.img = prog_base;
-       logo_info.download_bar.x = 39 + x_ofs;
-       logo_info.download_bar.y = 445 + y_ofs;
-       logo_info.download_bar_middle.img = prog_middle;
-       logo_info.download_bar_width = 4;
-       logo_info.rotate = 0;
-}
-#endif
-
-#ifdef CONFIG_MISC_INIT_R
-int misc_init_r(void)
-{
-       setenv("model", "GT-I8800");
-       if (board_is_m0_prxm())
-               setenv("board", "M0_PROXIMA");
-       else if (board_is_m0_real())
-               setenv("board", "M0_REAL");
-       else
-               setenv("board", "unknown");
-
-       show_hw_revision();
-
-       init_muic();
-
-       check_keypad();
-
-       ta_usb_connected = max77693_muic_check();
-       check_ta_usb();
-
-       init_battery();
-
-       init_charger();
-
-       check_battery();
-
-#ifdef CONFIG_CMD_PIT
-       check_pit();
-#endif
-       boot_mode = fixup_boot_mode(boot_mode);
-       set_boot_mode(boot_mode);
-#ifdef CONFIG_LCD
-       init_logo_info();
-       set_logo_image(boot_mode);
-#endif
-
-       return 0;
-}
-#endif
-
-#ifdef CONFIG_CMD_USBDOWN
-int usb_board_init(void)
-{
-       max77686_clear_irq();
-
-#ifdef CONFIG_CMD_PMIC
-       run_command("max77686 ldo 12 on", 0);
-       run_command("max77693 safeout 1 on", 0);
-#endif
-       return 0;
-}
-#endif
-
-int board_mmc_init(bd_t * bis)
-{
-       int i, err;
-
-       /* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
-       gpio_direction_output(&gpio2->k0, 2, 1);
-       gpio_set_pull(&gpio2->k0, 2, GPIO_PULL_NONE);
-
-       /*
-        * eMMC GPIO:
-        * SDR 8-bit@48MHz at MMC0
-        * GPK0[0]      SD_0_CLK(2)
-        * GPK0[1]      SD_0_CMD(2)
-        * GPK0[2]      SD_0_CDn        -> Not used
-        * GPK0[3:6]    SD_0_DATA[0:3](2)
-        * GPK1[3:6]    SD_0_DATA[0:3](3)
-        *
-        * DDR 4-bit@26MHz at MMC4
-        * GPK0[0]      SD_4_CLK(3)
-        * GPK0[1]      SD_4_CMD(3)
-        * GPK0[2]      SD_4_CDn        -> Not used
-        * GPK0[3:6]    SD_4_DATA[0:3](3)
-        * GPK1[3:6]    SD_4_DATA[4:7](4)
-        */
-       for (i = 0; i < 7; i++) {
-               if (i == 2)
-                       continue;
-               /* GPK0[0:6] special function 2 */
-               gpio_cfg_pin(&gpio2->k0, i, 0x2);
-               /* GPK0[0:6] pull disable */
-               gpio_set_pull(&gpio2->k0, i, GPIO_PULL_NONE);
-               /* GPK0[0:6] drv 4x */
-               gpio_set_drv(&gpio2->k0, i, GPIO_DRV_4X);
-       }
-
-       for (i = 3; i < 7; i++) {
-               /* GPK1[3:6] special function 3 */
-               gpio_cfg_pin(&gpio2->k1, i, 0x3);
-               /* GPK1[3:6] pull disable */
-               gpio_set_pull(&gpio2->k1, i, GPIO_PULL_NONE);
-               /* GPK1[3:6] drv 4x */
-               gpio_set_drv(&gpio2->k1, i, GPIO_DRV_4X);
-       }
-
-       /*
-        * MMC device init
-        * mmc0  : eMMC (8-bit buswidth)
-        * mmc2  : SD card (4-bit buswidth)
-        */
-       err = s5p_mmc_init(0, 8);
-
-       /* T-flash detect */
-       gpio_cfg_pin(&gpio2->x3, 4, 0xf);
-       gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
-
-       /*
-        * Check the T-flash  detect pin
-        * GPX3[3] T-flash detect pin
-        */
-       if (!gpio_get_value(&gpio2->x3, 4)) {
-               /*
-                * SD card GPIO:
-                * GPK2[0]      SD_2_CLK(2)
-                * GPK2[1]      SD_2_CMD(2)
-                * GPK2[2]      SD_2_CDn        -> Not used
-                * GPK2[3:6]    SD_2_DATA[0:3](2)
-                */
-               for (i = 0; i < 7; i++) {
-                       if (i == 2)
-                               continue;
-                       /* GPK2[0:6] special function 2 */
-                       gpio_cfg_pin(&gpio2->k2, i, 0x2);
-                       /* GPK2[0:6] pull disable */
-                       gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE);
-                       /* GPK2[0:6] drv 4x */
-                       gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X);
-               }
-               err = s5p_mmc_init(2, 4);
-       }
-
-       return err;
-
-}
-
-static int do_muic(cmd_tbl_t * cmdtp, int flag, int argc, char *const argv[])
-{
-       char cmd[64];
-       int count;
-       int i;
-
-       /*
-        * muic command are used in others (e.g., fixup_uart_path)
-        * but pegasusq boards use max77686 as muic
-        * so it need to reconnect to muic
-        */
-       count = sprintf(cmd, "max77693");
-       for (i = 1; i < argc; i++)
-               count += sprintf(cmd + count, " %s", argv[i]);
-
-       run_command(cmd, 0);
-}
-
-U_BOOT_CMD(
-       muic, 4, 1, do_muic,
-       "run the max77686 cmd",
-       ""
-);
index d6753c4..a426b0f 100644 (file)
@@ -128,7 +128,6 @@ omap4_sdp4430                arm         armv7       sdp4430             ti
 omap4_universal              arm         armv7       universal_omap4     samsung        omap4
 s5pc110_universal            arm         armv7       universal_c110      samsung        s5pc1xx
 exynos_trats                 arm         armv7       trats               samsung        exynos      exynos_trats:MMC_BOOT
 omap4_universal              arm         armv7       universal_omap4     samsung        omap4
 s5pc110_universal            arm         armv7       universal_c110      samsung        s5pc1xx
 exynos_trats                 arm         armv7       trats               samsung        exynos      exynos_trats:MMC_BOOT
-exynos_trats2                arm         armv7       trats2              samsung        exynos      exynos_trats2:MMC_BOOT
 s5p_goni                     arm         armv7       goni                samsung        s5pc1xx
 smdkc100                     arm         armv7       smdkc100            samsung        s5pc1xx
 s5pc210_universal            arm         armv7       universal_c210      samsung        exynos
 s5p_goni                     arm         armv7       goni                samsung        s5pc1xx
 smdkc100                     arm         armv7       smdkc100            samsung        s5pc1xx
 s5pc210_universal            arm         armv7       universal_c210      samsung        exynos
index 524e6d1..bdf6dbe 100644 (file)
@@ -1,20 +1,20 @@
 /*
  * USB Downloader
 /*
  * USB Downloader
- * Copyright (c) 2012 Samsung Electronics Co.,
  *
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd All Rights Reserved
+ * PROPRIETARY/CONFIDENTIAL
+ * This software is the confidential and proprietary information of
+ * SAMSUNG ELECTRONICS ("Confidential Information").
+ * You shall not disclose such Confidential Information and shall
+ * use it only in accordance with the terms of the license agreement
+ * you entered into with SAMSUNG ELECTRONICS.  SAMSUNG make no
+ * representations or warranties about the suitability
+ * of the software, either express or implied, including but not
+ * limited to the implied warranties of merchantability, fitness for
+ * a particular purpose, or non-infringement.
+ * SAMSUNG shall not be liable for any damages suffered by licensee as
+ * a result of using, modifying or distributing this software or its derivatives.
  *
  *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 
 #include <common.h>
  */
 
 #include <common.h>
index 34efca8..dd3e8f2 100644 (file)
 
 #include <common.h>
 #include <i2c.h>
 
 #include <common.h>
 #include <i2c.h>
+#include <asm/arch/gpio.h>
 #include <max77686.h>
 
 #include <max77686.h>
 
-/*
- * MAX77686 PMIC Registers
- */
-#define MAX77686_DEVICE_ID     0x00
-#define MAX77686_INTSRC                0x01
-#define MAX77686_INT1          0x02
-#define MAX77686_INT2          0x03
-#define MAX77686_INT1MSK       0x04
-#define MAX77686_INT2MSK       0x05
-#define MAX77686_STATUS1       0x06
-#define MAX77686_STATUS2       0x07
-#define MAX77686_PWRON         0x08
-#define MAX77686_ONOFF_DELAY   0x09
-#define MAX77686_MRSTB         0x0A
-
-/* INT1 Bit Map */
-#define MAX77686_INT1_MRSTB    (1 << 7)
-#define MAX77686_INT1_ONKEY1S  (1 << 6)
-#define MAX77686_INT1_ACOKBR   (1 << 5)
-#define MAX77686_INT1_ACOKBF   (1 << 4)
-#define MAX77686_INT1_PWRONR   (1 << 1)
-#define MAX77686_INT1_PWRONF   (1 << 0)
-/* PWRON Bit Map */
-#define MAX77686_PWRON_WTSRON  (1 << 7)
-#define MAX77686_PWRON_SMPLON  (1 << 6)
-#define MAX77686_PWRON_RTCA2   (1 << 5)
-#define MAX77686_PWRON_RTCA1   (1 << 4)
-#define MAX77686_PWRON_MRSTB   (1 << 3)
-#define MAX77686_PWRON_ACOKB   (1 << 2)
-#define MAX77686_PWRON_JIGONB  (1 << 1)
-#define MAX77686_PWRON_PWRON   (1 << 0)
 
 
+#define MAX77686_RTC_INT       (0 << 0)
 
 
-/*
- * MAX77686 RTC Registers
- */
-#define MAX77686_RTC_INT       0x00
-#define MAX77686_RTC_UPDATE0   0x04
-#define MAX77686_RTC_WTSR_SMPL 0x06
+enum {
+       PMIC_UART_SEL
+};
 
 struct pmic_opmode {
        /* not supported mode has '0xff' */
 
 struct pmic_opmode {
        /* not supported mode has '0xff' */
@@ -137,10 +105,9 @@ static const char * pwron_source[] = {
        "WTSRON"
 };
 
        "WTSRON"
 };
 
-static unsigned int pmic_bus = -1;
+static struct max77686_platform_data *pmic_pd;
 
 
-static unsigned char reg_int1 = -1;
-static unsigned char reg_pwron = -1;
+static unsigned int pmic_bus = 5;
 
 static ulong max77686_hex_to_voltage(int buck, int ldo, int hex);
 
 
 static ulong max77686_hex_to_voltage(int buck, int ldo, int hex);
 
@@ -165,60 +132,17 @@ void show_pwron_source(char *buf)
        }
 }
 
        }
 }
 
-/*
- * RTC
- */
-static int max77686_rtc_probe(void)
-{
-       unsigned char addr = MAX77686_RTC_ADDR;
-
-       i2c_set_bus_num(pmic_bus);
-
-       if (i2c_probe(addr)) {
-               puts("Can't found max77686-rtc\n");
-               return -1;
-       }
-
-       return 0;
-}
-
-static void max77686_rtc_read_update()
-{
-       unsigned char addr = MAX77686_RTC_ADDR;
-       unsigned char val;
-
-       if (max77686_rtc_probe())
-               return;
-
-       val = 0x10;
-       i2c_write(addr, MAX77686_RTC_UPDATE0, 1, &val, 1);
-       udelay(16000);
-}
-
-static void max77686_rtc_write_update()
+int max77686_check_acokb_pwron(void)
 {
 {
-       unsigned char addr = MAX77686_RTC_ADDR;
+       unsigned char addr = MAX77686_PMIC_ADDR;
        unsigned char val;
 
        unsigned char val;
 
-       if (max77686_rtc_probe())
-               return;
-
-       val = 0x01;
-       i2c_write(addr, MAX77686_RTC_UPDATE0, 1, &val, 1);
-       udelay(16000);
-}
-
-void max77686_rtc_disable_wtsr_smpl(void)
-{
-       unsigned char addr = MAX77686_RTC_ADDR;
-       unsigned char val;
+       if (max77686_probe())
+               return -1;
 
 
-       if (max77686_rtc_probe())
-               return;
+       i2c_read(addr, MAX77686_PWRON, 1, &val, 1);
 
 
-       val = 0;
-       i2c_write(addr, MAX77686_RTC_WTSR_SMPL, 1, &val, 1);
-       max77686_rtc_write_update();
+       return !!(val & MAX77686_PWRON_ACOKB);
 }
 
 int max77686_rtc_init(void)
 }
 
 int max77686_rtc_init(void)
@@ -226,19 +150,19 @@ int max77686_rtc_init(void)
        unsigned char addr = MAX77686_RTC_ADDR;
        unsigned char val;
 
        unsigned char addr = MAX77686_RTC_ADDR;
        unsigned char val;
 
-       if (max77686_rtc_probe())
+       i2c_set_bus_num(pmic_bus);
+
+       if (i2c_probe(addr)) {
+               puts("Can't found max77686\n");
                return -1;
                return -1;
+       }
 
 
-       /* clear int flag */
        i2c_read(addr, MAX77686_RTC_INT, 1, &val, 1);
 
        return 0;
 }
 
        i2c_read(addr, MAX77686_RTC_INT, 1, &val, 1);
 
        return 0;
 }
 
-/*
- * PMIC
- */
-static int max77686_probe(void)
+int max77686_probe(void)
 {
        unsigned char addr = MAX77686_PMIC_ADDR;
 
 {
        unsigned char addr = MAX77686_PMIC_ADDR;
 
@@ -252,80 +176,84 @@ static int max77686_probe(void)
        return 0;
 }
 
        return 0;
 }
 
-int max77686_init(void)
-{
-       unsigned char addr = MAX77686_PMIC_ADDR;
-
-       reg_int1 = 0;
-       reg_pwron = 0;
-
-       if (max77686_probe())
-               return -1;
-
-       i2c_read(addr, MAX77686_INT1, 1, &reg_int1, 1);
-       i2c_read(addr, MAX77686_PWRON, 1, &reg_pwron, 1);
+#ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
+#define i2c_read(addr, reg, alen, val, len)    \
+                       i2c_read_r(addr, reg, alen, val, len)
+#endif
 
 
-       return 0;
-}
-
-int max77686_check_pwron_pwrkey(void)
-{
-       /* check int1, not pwron */
-       return !!(reg_int1 & MAX77686_INT1_PWRONR);
-}
-
-int max77686_check_pwron_wtsr(void)
-{
-       return !!(reg_pwron & MAX77686_PWRON_WTSRON);
-}
-
-int max77686_check_pwron_smpl(void)
-{
-       return !!(reg_pwron & MAX77686_PWRON_SMPLON);
-}
-
-unsigned char max77686_get_reg_pwron(void)
-{
-       return reg_pwron;
-}
-
-int max77686_check_acokb_pwron(void)
+int max77686_get_irq(int irq)
 {
        unsigned char addr = MAX77686_PMIC_ADDR;
 {
        unsigned char addr = MAX77686_PMIC_ADDR;
-       unsigned char val;
+       unsigned char val[2];
+       unsigned int ret;
+       unsigned int reg;
+       unsigned int shift;
 
        if (max77686_probe())
 
        if (max77686_probe())
-               return -1;
+               return 0;
 
 
-       i2c_read(addr, MAX77686_PWRON, 1, &val, 1);
-
-       return !!(val & MAX77686_PWRON_ACOKB);
-}
-
-int max77686_check_pwrkey(void)
-{
-       unsigned char addr = MAX77686_PMIC_ADDR;
-       unsigned char val;
+       switch (irq) {
+       case PWRONR:
+               reg = 0;
+               shift = 1;
+               break;
+       case PWRONF:
+               reg = 0;
+               shift = 0;
+               break;
+       case PWRON1S:
+               reg = 0;
+               shift = 6;
+               break;
+       default:
+               return 0;
+       }
 
 
-       if (max77686_probe())
-               return -1;
+       i2c_read(addr, 0x2, 1, val, 2);
 
 
-       i2c_read(addr, MAX77686_INT1, 1, &val, 1);
+       ret = val[reg] & (1 << shift);
 
 
-       return !!(val & MAX77686_INT1_PWRONR);
+       return !!ret;
 }
 
 }
 
-int max77686_clear_irq(void)
+/* get irq value at power on */
+int max77686_get_irq_booton(int irq)
 {
        unsigned char addr = MAX77686_PMIC_ADDR;
        unsigned char val[2];
 {
        unsigned char addr = MAX77686_PMIC_ADDR;
        unsigned char val[2];
+       unsigned int ret;
+       unsigned int reg;
+       unsigned int shift;
+       static int first = 1;
 
        if (max77686_probe())
 
        if (max77686_probe())
-               return -1;
+               return 0;
+
+       switch (irq) {
+       case PWRONR:
+               reg = 0;
+               shift = 1;
+               break;
+       case PWRONF:
+               reg = 0;
+               shift = 0;
+               break;
+       case PWRON1S:
+               reg = 0;
+               shift = 6;
+               break;
+       default:
+               return 0;
+       }
+
+       if (first) {
+               i2c_read(addr, 0x2, 1, val, 2);
+               first = 0;
+       }
 
 
-       i2c_read(addr, MAX77686_INT1, 1, val, 2);
+       ret = val[reg] & (1 << shift);
 
 
-       return 0;
+       return !!ret;
 }
 
 static int max77686_status(void)
 }
 
 static int max77686_status(void)
@@ -622,6 +550,33 @@ int max77686_set_32khz(unsigned char mode)
        return 0;
 }
 
        return 0;
 }
 
+static int max77686_gpio_control(int port, int value)
+{
+       if (pmic_pd == NULL)
+               return 1;
+
+       switch (port) {
+       case PMIC_UART_SEL:
+               gpio_cfg_pin(pmic_pd->bank, pmic_pd->uart_sel, 1);
+               gpio_set_value(pmic_pd->bank, pmic_pd->uart_sel, value);
+               break;
+       default:
+               break;
+       }
+
+       return 0;
+}
+
+void max77686_set_platform_data(struct max77686_platform_data *pd)
+{
+       if (pd == NULL) {
+               puts("pd is NULL.\n");
+               return;
+       }
+
+       pmic_pd = pd;
+}
+
 static int do_max77686(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
        int buck = 0, ldo = 0, on = -1;
 static int do_max77686(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
        int buck = 0, ldo = 0, on = -1;
@@ -632,6 +587,24 @@ static int do_max77686(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]
                if (strncmp(argv[1], "status", 6) == 0)
                        return max77686_status();
                break;
                if (strncmp(argv[1], "status", 6) == 0)
                        return max77686_status();
                break;
+       case 3:
+               if (strncmp(argv[1], "uart", 4) != 0)
+                       break;
+
+               if (strncmp(argv[2], "ap", 2) == 0)
+                       on = 1;
+               else if (strncmp(argv[2], "cp", 2) == 0)
+                       on = 0;
+               else
+                       break;
+
+               ret = max77686_gpio_control(PMIC_UART_SEL, on);
+
+               if (!ret)
+                       printf("pmic: %s %s\n", argv[1], argv[2]);
+               else
+                       printf("pmic_pd is not valid\n");
+
                return ret;
        case 4:
                if (argv[1][0] == 'l')
                return ret;
        case 4:
                if (argv[1][0] == 'l')
@@ -677,6 +650,7 @@ U_BOOT_CMD(
        max77686, 4, 1, do_max77686,
        "PMIC LDO & BUCK control for MAX77686",
        "status - Display PMIC LDO & BUCK status\n"
        max77686, 4, 1, do_max77686,
        "PMIC LDO & BUCK control for MAX77686",
        "status - Display PMIC LDO & BUCK status\n"
+       "max77686 uart ap/cp - Change uart path\n"
        "max77686 ldo num volt - Set LDO voltage\n"
        "max77686 ldo num on/lpm/standby/off - Set LDO output mode\n"
        "max77686 buck num volt - Set BUCK voltage\n"
        "max77686 ldo num volt - Set LDO voltage\n"
        "max77686 ldo num on/lpm/standby/off - Set LDO output mode\n"
        "max77686 buck num volt - Set BUCK voltage\n"
index ae1a891..3e599b6 100644 (file)
@@ -111,8 +111,8 @@ enum muic_path {
        MUIC_PATH_UART_AP,
 };
 
        MUIC_PATH_UART_AP,
 };
 
-static unsigned int pmic_bus = -1;
-static unsigned int muic_bus = -1;
+static unsigned int pmic_bus = 4;
+static unsigned int muic_bus = 4;
 
 static unsigned int revision;
 
 
 static unsigned int revision;
 
index a888092..d902f74 100644 (file)
@@ -26,7 +26,6 @@
 #include <asm/arch/power.h>
 #include <i2c.h>
 #include <max77693.h>
 #include <asm/arch/power.h>
 #include <i2c.h>
 #include <max77693.h>
-#include "fuelgauge_battery_data.h"
 
 #ifdef DEBUG_FG
 #define DEBUG(fmt,args...) printk(fmt, ##args)
 
 #ifdef DEBUG_FG
 #define DEBUG(fmt,args...) printk(fmt, ##args)
@@ -34,8 +33,6 @@
 #define DEBUG(fmt,args...) do {} while(0)
 #endif
 
 #define DEBUG(fmt,args...) do {} while(0)
 #endif
 
-#define msleep(a)      udelay(a * 1000)
-
 /* Register address */
 #define MAX77693_REG_STATUS            0x00
 #define MAX77693_REG_CAPREP            0x05
 /* Register address */
 #define MAX77693_REG_STATUS            0x00
 #define MAX77693_REG_CAPREP            0x05
 #define MAX77693_REG_AVG_CURRENT       0x0B
 #define MAX77693_REG_CONFIG            0x1D
 #define MAX77693_REG_VERSION           0x21
 #define MAX77693_REG_AVG_CURRENT       0x0B
 #define MAX77693_REG_CONFIG            0x1D
 #define MAX77693_REG_VERSION           0x21
-#define MAX77693_REG_OCV_RO            0xEE
-#define MAX77693_REG_OCV_WR            0xFB
+#define MAX77693_REG_VFOCV             0xFB
 #define MAX77693_REG_VFSOC             0xFF
 
 #define MAX77693_REG_VFSOC             0xFF
 
-static int fg_bus = -1;
-static int rst_status;
-static int charger_status;
-static int por;
-static u32 vfocv_table;
-static const char pszfg[] = "max77693-fg:";
-
-/* parameter for SDI 1750mA 2012.02.17 */
-/* Address 0x80h */
-static u16 sdi_1750_cell_character0[16] = {
-       0xACB0, 0xB630, 0xB950, 0xBA20, 0xBBB0, 0xBBE0, 0xBC30, 0xBD00,
-       0xBD60, 0xBDC0, 0xBF30, 0xC0A0, 0xC480, 0xC890, 0xCC40, 0xD010
-};
-
-/* Address 0x90h */
-static u16 sdi_1750_cell_character1[16] = {
-       0x0180, 0x0F10, 0x0060, 0x0E40, 0x3DC0, 0x4E10, 0x2D50, 0x3680,
-       0x3680, 0x0D50, 0x0D60, 0x0D80, 0x0C80, 0x0860, 0x0800, 0x0800
-};
-
-/* Address 0xA0h */
-static u16 sdi_1750_cell_character2[16] = {
-       0x0080, 0x0080, 0x0080, 0x0080, 0x0080, 0x0080, 0x0080, 0x0080,
-       0x0080, 0x0080, 0x0080, 0x0080, 0x0080, 0x0080, 0x0080, 0x0080
-};
-
-/* parameter for SDI 2100mA 2012.01.25 */
-/* Address 0x80h */
-static u16 sdi_2100_cell_character0[16] = {
-       0xA890, 0xB780, 0xB9A0, 0xBBF0, 0xBC30, 0xBC80, 0xBCF0, 0xBD50,
-       0xBE60, 0xBFB0, 0xC1B0, 0xC4B0, 0xC560, 0xCCE0, 0xD170, 0xD7A0
-};
-
-/* Address 0x90h */
-static u16 sdi_2100_cell_character1[16] = {
-       0x0150, 0x1000, 0x0C10, 0x3850, 0x2E50, 0x32F0, 0x3040, 0x12F0,
-       0x0FE0, 0x1090, 0x09E0, 0x0BD0, 0x0820, 0x0720, 0x0700, 0x0700
-};
-
-/* Address 0xA0h */
-static u16 sdi_2100_cell_character2[16] = {
-       0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100,
-       0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100
-};
-
-/* parameter for SDI 2100mA 2012.10.11 */
-/* Address 0x80h */
-static u16 sdi_3000_cell_character0[16] = {
-       0xAF70, 0xB570, 0xB7A0, 0xB900, 0xBA70, 0xBBF0, 0xBC40, 0xBC90,
-       0xBE20, 0xBF80, 0xC340, 0xC600, 0xCA90, 0xCD90, 0xD3B0, 0xD7C0
-};
-
-/* Address 0x90h */
-static u16 sdi_3000_cell_character1[16] = {
-       0x0170, 0x0D20, 0x0BA0, 0x0BF0, 0x0DF0, 0x3F40, 0x3F00, 0x1A00,
-       0x18E0, 0x09F0, 0x0970, 0x0920, 0x0860, 0x0680, 0x0600, 0x0600
-};
-
-/* Address 0xA0h */
-static u16 sdi_3000_cell_character2[16] = {
-       0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100,
-       0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100
-};
+#define FIRMWARE_CONFIG_DEFAULT                0x2350
+#define RCOMP0_DEFAULT                 0x0060
+#define TEMPCO_DEFAULT                 0x1015
+
+/* Parameter values from MAXIM 1650mA SDI 20110303 */
+#define DSG_DV                         65      /* mV */
+#define CHG_DV                         40      /* mV */
+#define T_DV                           100     /* mV, voltage tolerance */
+#define T_SOC_DSG_UPPER                        10      /* 10%, soc tolerance */
+#define T_SOC_DSG_BELOW                        20      /* 20%, soc tolerance */
+#define T_SOC_CHG_UPPER                        10      /* 10%, soc tolerance */
+#define T_SOC_CHG_BELOW                        10      /* 10%, soc tolerance */
+#define T_SOC_W                                27      /* 27%, soc tolerance(reset case) */
+#define T_SOC_LOW                      3       /* 3%, soc tolerance(low batt) */
+#define T_SOC_HIGH                     97      /* 97%, soc tolerance(high batt) */
+#define PLAT_VOL_HIGH_DSG              380000  /* unit : 0.01mV */
+#define PLAT_VOL_LOW_DSG               365000  /* unit : 0.01mV */
+#define PLAT_VOL_HIGH_CHG              385000  /* unit : 0.01mV */
+#define PLAT_VOL_LOW_CHG               370000  /* unit : 0.01mV */
+#define PLAT_T_SOC                     0       /* 0%, soc tolerance */
+#define DSG_VCELL_COMP                 -500    /* vcell compensation for table soc, unit : 0.01mV */
+#define CHG_VCELL_COMP                 8500    /* vcell compensation for table soc, unit : 0.01mV */
+#define AVER_SAMPLE_CNT                        6
 
 /* table_soc = (new_vcell - new_v0)*new_slope/100000 (unit : 0.01% ) */
 static struct fuelgauge_dsg_data_table {
 
 /* table_soc = (new_vcell - new_v0)*new_slope/100000 (unit : 0.01% ) */
 static struct fuelgauge_dsg_data_table {
@@ -185,31 +141,28 @@ static struct fuelgauge_ocv_data_table {
        { 0, 0, 0 }
 };
 
        { 0, 0, 0 }
 };
 
-static struct table_soc_data sdi_2100_table_soc_data[] = {
-       {       3000, 0, 0, 0                   },
-       {       3306, 1289, 105100, 3170600     },
-       {       3597, 4059, 4100, 3580300       },
-       {       3622, 10148, 8500, 3535900      },
-       {       3672, 16039, 2200, 3637100      },
-       {       3714, 35344, 4100, 3569600      },
-       {       3782, 51984, 7000, 3420600      },
-       {       3902, 69246, 11400, 3112200     },
-       {       4225, 97566, 0, 100000000       },
+u16 cell_character_80h[16] = {
+       0xA2A0, 0xB6E0, 0xB850, 0xBAD0, 0xBB20, 0xBB70, 0xBBC0, 0xBC20,
+       0xBC80, 0xBCE0, 0xBD80, 0xBE20, 0xC090, 0xC420, 0xC910, 0xD070
 };
 
 };
 
-static struct table_soc_data sdi_3000_table_soc_data[] = {
-       { 3301, 1148, 0, 0 },
-       { 3609, 4230, 0, 0 },
-       { 3640, 11828, 0, 0 },
-       { 3657, 13469, 0, 0 },
-       { 3707, 21840, 0, 0 },
-       { 3733, 34992, 0, 0 },
-       { 3758, 43629, 0, 0 },
-       { 3806, 53027, 0, 0 },
-       { 3900, 65387, 0, 0 },
-       { 4265, 100492, 0, 0 },
+u16 cell_character_90h[16] = {
+       0x0090, 0x1A50, 0x02F0, 0x2060, 0x2060, 0x2E60, 0x26A0, 0x2DB0,
+       0x2DB0, 0x1870, 0x2A20, 0x16F0, 0x08F0, 0x0D40, 0x08C0, 0x08C0
 };
 
 };
 
+u16 cell_character_a0h[16] = {
+       0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100,
+       0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100
+};
+
+static int fg_bus = 9;
+static int rst_status;
+static int charger_status;
+static int por;
+static u32 vfocv_table;
+static const char pszfg[] = "max77693-fg:";
+
 static inline void mdelay(int msec)
 {
        udelay(msec * 1000);
 static inline void mdelay(int msec)
 {
        udelay(msec * 1000);
@@ -296,45 +249,6 @@ u32 max77693_fg_get_vcell(void)
        return vcell * 625;
 }
 
        return vcell * 625;
 }
 
-static u32 max77693_fg_get_ocv(void)
-{
-       u16 value;
-       u32 ocv;
-
-       value = fuelgauge_reg_read(MAX77693_REG_OCV_RO);
-       ocv = (u32)(value >> 3);
-
-       DEBUG("%s\tocv = 0x%x (0x%x)\n", pszfg, vcell, value);
-
-       return ocv * 625 / 1000;
-}
-
-u32 max77693_fg_get_soc(void)
-{
-       u16 value;
-       u32 soc;
-
-       value = fuelgauge_reg_read(MAX77693_REG_VFSOC);
-       soc = (u32)(value >> 8);
-
-       DEBUG("%s\tsoc = 0x%x (0x%x)\n", pszfg, soc, value);
-
-       return soc;
-}
-
-static u32 max77693_fg_get_vfocv(void)
-{
-       u16 value;
-       u32 vfocv;
-
-       value = fuelgauge_reg_read(MAX77693_REG_OCV_WR);
-       vfocv = (u32)(value >> 3);
-
-       DEBUG("%s\tvfocv = 0x%x (0x%x)\n", pszfg, vcell, value);
-
-       return vfocv * 625 / 1000;
-}
-
 static u32 max77693_fg_get_average_vcell(void)
 {
        int i;
 static u32 max77693_fg_get_average_vcell(void)
 {
        int i;
@@ -361,6 +275,19 @@ static u32 max77693_fg_get_average_vcell(void)
        return (vcell_total - vcell_max - vcell_min) / (AVER_SAMPLE_CNT - 2);
 }
 
        return (vcell_total - vcell_max - vcell_min) / (AVER_SAMPLE_CNT - 2);
 }
 
+static u32 max77693_fg_get_vfocv(void)
+{
+       u16 value;
+       u32 vfocv;
+
+       value = fuelgauge_reg_read(MAX77693_REG_VFOCV);
+       vfocv = (u32)(value >> 3);
+
+       DEBUG("%s\tvfocv = 0x%x (0x%x)\n", pszfg, vcell, value);
+
+       return vfocv * 625 / 1000;
+}
+
 static u32 max77693_fg_get_vfocv_table(u32 raw_soc)
 {
        int i, idx, idx_end;
 static u32 max77693_fg_get_vfocv_table(u32 raw_soc)
 {
        int i, idx, idx_end;
@@ -398,6 +325,19 @@ static u32 max77693_fg_get_vfocv_table(u32 raw_soc)
        return vfocv;
 }
 
        return vfocv;
 }
 
+u32 max77693_fg_get_soc(void)
+{
+       u16 value;
+       u32 soc;
+
+       value = fuelgauge_reg_read(MAX77693_REG_VFSOC);
+       soc = (u32)(value >> 8);
+
+       DEBUG("%s\tsoc = 0x%x (0x%x)\n", pszfg, soc, value);
+
+       return soc;
+}
+
 static u16 max77693_fg_check_version(void)
 {
        u16 version = fuelgauge_reg_read(MAX77693_REG_VERSION);
 static u16 max77693_fg_check_version(void)
 {
        u16 version = fuelgauge_reg_read(MAX77693_REG_VERSION);
@@ -407,53 +347,12 @@ static u16 max77693_fg_check_version(void)
        return version;
 }
 
        return version;
 }
 
-static void max77693_fg_load_init_config(enum battery_type batt_type)
+static void max77693_fg_load_init_config(void)
 {
 {
+       int i;
        u16 data0[16], data1[16], data2[16];
        u16 status;
        u16 data0[16], data1[16], data2[16];
        u16 status;
-       u16 rcomp0, tempco;
-       u16 *cell_character0, *cell_character1, *cell_character2;
-       u32 vcell, soc, vfocv;
-       u32 i;
-       u32 rewrite_count = 5;
-
-       vcell = max77693_fg_get_average_vcell();
-       soc = max77693_fg_get_soc();
-       vfocv = max77693_fg_get_ocv();
-
-       printf("%s\tPOR start: vcell(%d), vfocv(%d), soc(%d)\n", pszfg, vcell, vfocv, soc);
-
-       /* update battery parameter */
-       switch (batt_type) {
-       case BATTERY_SDI_1750:
-               printf("%s\tupdate SDI 1750 parameter\n", pszfg);
-               rcomp0 = SDI_1750_RCOMP0;
-               tempco = SDI_1750_TEMPCO;
-               cell_character0 = sdi_1750_cell_character0;
-               cell_character1 = sdi_1750_cell_character1;
-               cell_character2 = sdi_1750_cell_character2;
-               break;
-       case BATTERY_SDI_2100:
-               printf("%s\tupdate SDI 2100 parameter\n", pszfg);
-               rcomp0 = SDI_2100_RCOMP0;
-               tempco = SDI_2100_TEMPCO;
-               cell_character0 = sdi_2100_cell_character0;
-               cell_character1 = sdi_2100_cell_character1;
-               cell_character2 = sdi_2100_cell_character2;
-               break;
-       case BATTERY_SDI_3000:
-               printf("%s\tupdate SDI 3000 parameter\n", pszfg);
-               rcomp0 = SDI_3000_RCOMP0;
-               tempco = SDI_3000_TEMPCO;
-               cell_character0 = sdi_3000_cell_character0;
-               cell_character1 = sdi_3000_cell_character1;
-               cell_character2 = sdi_3000_cell_character2;
-               break;
-
-       default:
-               printf("%s\tunknown battery type, keep parameter\n", pszfg);
-               break;
-       }
+       int rewrite_count = 5;
 
        /* 1. Delay 500mS */
        /* delay(500); */
 
        /* 1. Delay 500mS */
        /* delay(500); */
@@ -467,23 +366,23 @@ rewrite_model:
        fuelgauge_reg_write(0x63, 0x00C4);
 
        /* 5. Write/Read/Verify the Custom Model */
        fuelgauge_reg_write(0x63, 0x00C4);
 
        /* 5. Write/Read/Verify the Custom Model */
-       fuelgauge_reg_write_16n(0x80, cell_character0);
-       fuelgauge_reg_write_16n(0x90, cell_character1);
-       fuelgauge_reg_write_16n(0xA0, cell_character2);
+       fuelgauge_reg_write_16n(0x80, cell_character_80h);
+       fuelgauge_reg_write_16n(0x90, cell_character_90h);
+       fuelgauge_reg_write_16n(0xA0, cell_character_a0h);
 
        fuelgauge_reg_read_16n(0x80, data0);
        fuelgauge_reg_read_16n(0x90, data1);
        fuelgauge_reg_read_16n(0xA0, data2);
 
        for (i = 0; i < 16; i++) {
 
        fuelgauge_reg_read_16n(0x80, data0);
        fuelgauge_reg_read_16n(0x90, data1);
        fuelgauge_reg_read_16n(0xA0, data2);
 
        for (i = 0; i < 16; i++) {
-               if (cell_character0[i] != data0[i])
+               if (cell_character_80h[i] != data0[i])
                        goto rewrite_model;
                        goto rewrite_model;
-               if (cell_character1[i] != data1[i])
+               if (cell_character_90h[i] != data1[i])
                        goto rewrite_model;
                        goto rewrite_model;
-               if (cell_character2[i] != data2[i])
+               if (cell_character_a0h[i] != data2[i])
                        goto rewrite_model;
        }
                        goto rewrite_model;
        }
-relock_model:
+
        /* 8. Lock model access */
        fuelgauge_reg_write(0x62, 0x0000);
        fuelgauge_reg_write(0x63, 0x0000);
        /* 8. Lock model access */
        fuelgauge_reg_write(0x62, 0x0000);
        fuelgauge_reg_write(0x63, 0x0000);
@@ -506,8 +405,8 @@ relock_model:
        }
 
        /* 10. Write Custom Parameters */
        }
 
        /* 10. Write Custom Parameters */
-       fuelgauge_reg_write_and_verify(0x38, rcomp0);
-       fuelgauge_reg_write_and_verify(0x39, tempco);
+       fuelgauge_reg_write_and_verify(0x38, RCOMP0_DEFAULT);
+       fuelgauge_reg_write_and_verify(0x39, TEMPCO_DEFAULT);
 
        /* 11. Delay at least 350mS */
        mdelay(350);
 
        /* 11. Delay at least 350mS */
        mdelay(350);
@@ -527,132 +426,176 @@ relock_model:
 
        /* 18. Delay at least 350mS */
 
 
        /* 18. Delay at least 350mS */
 
-       vcell = max77693_fg_get_average_vcell();
-       soc = max77693_fg_get_soc();
-       vfocv = max77693_fg_get_ocv();
-
-       printf("%s\tPOR finish: vcell(%d), vfocv(%d), soc(%d)\n", pszfg, vcell, vfocv, soc);
+       printf("%s\tinitialized\n", pszfg);
 }
 
 }
 
-static int get_table_soc(u32 vcell, enum battery_type batt_type)
+static int max77693_fg_check_validation(u32 vcell, u32 soc)
 {
        s32 raw_table_soc = 0;
 {
        s32 raw_table_soc = 0;
-       u32 table_soc;
-       u32 idx_start, idx_end, idx;
-       struct table_soc_data *table_soc_data;
+       u32 table_soc = 0;
+       u32 i, idx = 0, idx_end, ret = 0;
 
 
-       idx_start = 0;
-       idx_end = 0;
+       vfocv_table = 0;
+       vcell *= 100;
+
+       if (charger_status) {
+               /* charging case */
+               vcell += CHG_VCELL_COMP;
+               idx_end = (int)ARRAY_SIZE(max77693_fg_chg_soc_table) - 1;
+               if (vcell <= max77693_fg_chg_soc_table[0].table_v0) {
+                       if (soc > T_SOC_LOW)
+                               ret = 2;
+                       table_soc = 0;
+
+                       goto skip_table_soc;
+               } else if (vcell > max77693_fg_chg_soc_table[idx_end].table_vcell) {
+                       if (soc < T_SOC_HIGH)
+                               ret = 2;
+                       table_soc = 100;
+
+                       goto skip_table_soc;
+               }
 
 
-       switch (batt_type) {
-       case BATTERY_SDI_2100:
-               table_soc_data = sdi_2100_table_soc_data;
-               idx_end = (int)ARRAY_SIZE(sdi_2100_table_soc_data) - 1;
-               break;
-       case BATTERY_SDI_3000:
-               table_soc_data = sdi_3000_table_soc_data;
-               idx_end = (int)ARRAY_SIZE(sdi_3000_table_soc_data) - 1;
-               break;
-       default:
-               printf("%s\tunknown battery type. uses 2100mAh data default.\n", pszfg);
-               table_soc_data = sdi_2100_table_soc_data;
-               idx_end = (int)ARRAY_SIZE(sdi_2100_table_soc_data) - 1;
-               break;
-       }
+               /* find range */
+               for (i = 0; i < idx_end; i++) {
+                       if (vcell <= max77693_fg_chg_soc_table[0].table_vcell) {
+                               idx = 0;
+                               break;
+                       } else if (vcell > max77693_fg_chg_soc_table[i].table_vcell
+                                  && vcell <=
+                                  max77693_fg_chg_soc_table[i + 1].table_vcell) {
+                               idx = i + 1;
+                               break;
+                       }
+               }
 
 
-       if (vcell < table_soc_data[idx_start].table_vcell) {
-               printf("%s: vcell(%d) out of range, set table soc as 0\n", __func__, vcell);
-               table_soc = 0;
-               goto calculate_finish;
-       } else if (vcell > table_soc_data[idx_end].table_vcell) {
-               printf("%s: vcell(%d) out of range, set table soc as 100\n", __func__, vcell);
-               table_soc = 100;
-               goto calculate_finish;
-       }
+               /* calculate table soc */
+               raw_table_soc = ((vcell -
+                       max77693_fg_chg_soc_table[idx].table_v0) *
+                       max77693_fg_chg_soc_table[idx].table_slope) / 100000;
 
 
-       while (idx_start <= idx_end) {
-               idx = (idx_start + idx_end) / 2;
-               if (table_soc_data[idx].table_vcell > vcell) {
-                       idx_end = idx - 1;
-               } else if (table_soc_data[idx].table_vcell < vcell) {
-                       idx_start = idx + 1;
-               } else
-                       break;
-       }
-       table_soc = table_soc_data[idx].table_soc;
-
-       /* high resolution */
-       if (vcell < table_soc_data[idx].table_vcell)
-               table_soc = table_soc_data[idx].table_soc -
-                       ((table_soc_data[idx].table_soc - table_soc_data[idx-1].table_soc) *
-                       (table_soc_data[idx].table_vcell - vcell) /
-                       (table_soc_data[idx].table_vcell - table_soc_data[idx-1].table_vcell));
-       else
-               table_soc = table_soc_data[idx].table_soc +
-                       ((table_soc_data[idx+1].table_soc - table_soc_data[idx].table_soc) *
-                       (vcell - table_soc_data[idx].table_vcell) /
-                       (table_soc_data[idx+1].table_vcell - table_soc_data[idx].table_vcell));
-
-       printf("%s: vcell(%d) is caculated to t-soc(%d.%d)\n", __func__, vcell, table_soc / 1000, table_soc % 1000);
-       table_soc /= 1000;
-
-calculate_finish:
-       return table_soc;
-}
+               DEBUG("%d = (%d - %d)*%d/100000\n", raw_table_soc, vcell,
+                       max77693_fg_chg_soc_table[idx].table_v0,
+                       max77693_fg_chg_soc_table[idx].table_slope);
 
 
-static int check_fuelgauge_powered(void)
-{
-       int pwr_chk = 0;
+               if (raw_table_soc > 10000)
+                       raw_table_soc = 10000;
+               else if (raw_table_soc < 0)
+                       raw_table_soc = 0;
+               table_soc = raw_table_soc / 100;
 
 
-       pwr_chk = fuelgauge_reg_read(MAX77693_REG_OCV_RO);
+               /* check validation */
+               if (por == 1 &&
+                   vcell <= PLAT_VOL_HIGH_CHG && vcell >= PLAT_VOL_LOW_CHG) {
+                       if (table_soc > (soc + PLAT_T_SOC) ||
+                           soc > (table_soc + PLAT_T_SOC))
+                               ret = 2;
+               } else if (rst_status == SWRESET) {
+                       if (table_soc > (soc + T_SOC_W) ||
+                           soc > (table_soc + T_SOC_W))
+                               ret = 2;
+               } else {
+                       if (table_soc > (soc + T_SOC_CHG_UPPER) ||
+                           soc > (table_soc + T_SOC_CHG_BELOW))
+                               ret = 2;
+               }
 
 
-       if (pwr_chk < 0)
-               return 0;
-       else
-               return 1;
+               vfocv_table = max77693_fg_get_vfocv_table(raw_table_soc);
+       } else {
+               /* discharging case */
+               vcell += DSG_VCELL_COMP;
+               idx_end = (int)ARRAY_SIZE(max77693_fg_dsg_soc_table) - 1;
+               if (vcell <= max77693_fg_dsg_soc_table[idx_end].table_vcell ||
+                       vcell < 340000) {
+                       if (soc > T_SOC_LOW)
+                               ret = 1;
+                       table_soc = 0;
+
+                       goto skip_table_soc;
+               } else if (vcell >= 417000) {
+                       if (soc < T_SOC_HIGH)
+                               ret = 1;
+                       table_soc = 100;
+
+                       goto skip_table_soc;
+               }
+
+               /* find range */
+               for (i = 0; i < idx_end; i++) {
+                       if (vcell >= max77693_fg_dsg_soc_table[0].table_vcell) {
+                               idx = 0;
+                               break;
+                       } else if (vcell < max77693_fg_dsg_soc_table[i].table_vcell
+                                  && vcell >=
+                                  max77693_fg_dsg_soc_table[i + 1].table_vcell) {
+                               idx = i + 1;
+                               break;
+                       }
+               }
+
+               /* calculate table soc */
+               raw_table_soc = ((vcell -
+                       max77693_fg_dsg_soc_table[idx].table_v0) *
+                       max77693_fg_dsg_soc_table[idx].table_slope) / 100000;
+
+               DEBUG("%d = (%d - %d)*%d/100000\n", raw_table_soc, vcell,
+                       max77693_fg_dsg_soc_table[idx].table_v0,
+                       max77693_fg_dsg_soc_table[idx].table_slope);
+
+               if (raw_table_soc > 10000)
+                       raw_table_soc = 10000;
+               else if (raw_table_soc < 0)
+                       raw_table_soc = 0;
+               table_soc = raw_table_soc / 100;
+
+               /* check validation */
+               if (por == 1 &&
+                   vcell <= PLAT_VOL_HIGH_DSG && vcell >= PLAT_VOL_LOW_DSG) {
+                       if (table_soc > (soc + PLAT_T_SOC) ||
+                           soc > (table_soc + PLAT_T_SOC))
+                               ret = 1;
+               } else if (rst_status == SWRESET) {
+                       if (table_soc > (soc + T_SOC_W) ||
+                           soc > (table_soc + T_SOC_W))
+                               ret = 1;
+               } else {
+                       if (table_soc > (soc + T_SOC_DSG_UPPER) ||
+                           soc > (table_soc + T_SOC_DSG_BELOW))
+                               ret = 1;
+               }
+
+               vfocv_table = max77693_fg_get_vfocv_table(raw_table_soc);
+       }
+
+skip_table_soc:
+       return ret;
 }
 
 }
 
-void max77693_fg_init(enum battery_type batt_type, int charger_type)
+void max77693_fg_init(int charger_type)
 {
 {
-       u32 soc, vcell, vfocv, power_check, table_soc, soc_diff, soc_chk_cnt, check_cnt;
-       u32 raw_data, t_raw_data;
-       u16 status, reg_data;
+       u32 vcell, soc, vfocv;
+       u16 status;
        u8 recalculation_type = 0, soc_valid = 0;
        u8 raw_vcell[2], t_raw_vcell[2] = {0 , 0};
        u8 recalculation_type = 0, soc_valid = 0;
        u8 raw_vcell[2], t_raw_vcell[2] = {0 , 0};
+       u32 raw_data, t_raw_data;
 
        if (max77693_fg_probe()) {
                printf("%s\tinitialize failed\n", pszfg);
                return;
        }
 
 
        if (max77693_fg_probe()) {
                printf("%s\tinitialize failed\n", pszfg);
                return;
        }
 
-       power_check = check_fuelgauge_powered();
-       while (power_check == 0) {
-               msleep(500);
-               power_check = check_fuelgauge_powered();
-
-               check_cnt++;
-               printf("%s\t:fuelgauge is not powered(%d).\n", pszfg, check_cnt);
-
-               if (check_cnt >= FUELGAUGE_POWER_CHECK_COUNT) {
-                       printf("%s\t:fuelgauge power failed.\n", pszfg);
-                       return;
-               }
-       }
-
        charger_status = charger_type;
 
        rst_status = get_reset_status();
 
        status = fuelgauge_reg_read(MAX77693_REG_STATUS);
        if (status & 0x02) {
        charger_status = charger_type;
 
        rst_status = get_reset_status();
 
        status = fuelgauge_reg_read(MAX77693_REG_STATUS);
        if (status & 0x02) {
-               max77693_fg_load_init_config(batt_type);
+               max77693_fg_load_init_config();
                por = 1;
        } else {
                por = 0;
        }
 
                por = 1;
        } else {
                por = 0;
        }
 
-       printf("%s\tpor = 0x%04x\n", pszfg, status);
-
        vcell = max77693_fg_get_average_vcell();
        raw_data = (vcell * 1000) / 625;
        raw_data <<= 3;
        vcell = max77693_fg_get_average_vcell();
        raw_data = (vcell * 1000) / 625;
        raw_data <<= 3;
@@ -667,42 +610,6 @@ void max77693_fg_init(enum battery_type batt_type, int charger_type)
        printf("%s\tvcell = %d mV, soc = %d, vfocv = %d mV\n",
                pszfg, vcell, soc, vfocv);
 
        printf("%s\tvcell = %d mV, soc = %d, vfocv = %d mV\n",
                pszfg, vcell, soc, vfocv);
 
-       if ((batt_type == BATTERY_SDI_2100) || (batt_type == BATTERY_SDI_3000)) {
-               table_soc = get_table_soc(vcell, batt_type);
-
-               if (por == 0)
-                       goto init_finish;
-
-check_soc_validation:
-               /* check validation */
-               if (soc > table_soc)
-                       soc_diff = soc - table_soc;
-               else
-                       soc_diff = table_soc - soc;
-
-               if (soc_diff > SOC_DIFF_TH) {
-                       printf("%s: [#%d] diff(%d), soc(%d) and table soc(%d)\n", __func__,
-                               ++soc_chk_cnt, soc_diff, soc, table_soc);
-
-                       raw_data = (vcell * 1000) / 625;
-                       raw_data <<= 3;
-                       raw_vcell[1] = (raw_data & 0xff00) >> 8;
-                       raw_vcell[0] = raw_data & 0xff;
-                       fuelgauge_reg_write(MAX77693_REG_OCV_WR, (raw_vcell[1] << 8) | raw_vcell[0]);
-
-                       mdelay(300);
-
-                       soc = max77693_fg_get_soc();
-                       vfocv = max77693_fg_get_vfocv();
-                       vcell = max77693_fg_get_average_vcell();
-                       table_soc = get_table_soc(vcell, batt_type);
-
-                       if (soc_chk_cnt < SOC_DIFF_CHECK_COUNT)
-                               goto check_soc_validation;
-               }
-               goto init_finish;
-       }
-
        vfocv_table = 0;
        recalculation_type = 0;
 
        vfocv_table = 0;
        recalculation_type = 0;
 
@@ -718,6 +625,8 @@ check_soc_validation:
                }
        }
 
                }
        }
 
+       soc_valid = max77693_fg_check_validation(vcell, soc);
+
        if (vfocv_table != 0) {
                t_raw_data = (vfocv_table * 1000) / 625;
                t_raw_data <<= 3;
        if (vfocv_table != 0) {
                t_raw_data = (vfocv_table * 1000) / 625;
                t_raw_data <<= 3;
@@ -725,15 +634,20 @@ check_soc_validation:
                t_raw_vcell[0] = t_raw_data & 0xff;
        }
 
                t_raw_vcell[0] = t_raw_data & 0xff;
        }
 
+       if (soc_valid == 1)     /* discharging */
+               recalculation_type = 4;
+       else if (soc_valid == 2)        /* charging */
+               recalculation_type = 3;
+
        switch (recalculation_type) {
        case 1:
        case 3:
                /* 0x200 means 40mV */
                if (vfocv_table != 0)
        switch (recalculation_type) {
        case 1:
        case 3:
                /* 0x200 means 40mV */
                if (vfocv_table != 0)
-                       fuelgauge_reg_write(MAX77693_REG_OCV_WR,
+                       fuelgauge_reg_write(MAX77693_REG_VFOCV,
                                        (t_raw_vcell[1] << 8) | t_raw_vcell[0]);
                else
                                        (t_raw_vcell[1] << 8) | t_raw_vcell[0]);
                else
-                       fuelgauge_reg_write(MAX77693_REG_OCV_WR,
+                       fuelgauge_reg_write(MAX77693_REG_VFOCV,
                                        ((raw_vcell[1] -
                                          0x2) << 8) | (raw_vcell[0] - 0x00));
                mdelay(500);
                                        ((raw_vcell[1] -
                                          0x2) << 8) | (raw_vcell[0] - 0x00));
                mdelay(500);
@@ -743,10 +657,10 @@ check_soc_validation:
                /* 0x2C0 means 55mV */
                /* 0x340 means 65mV */
                if (vfocv_table != 0)
                /* 0x2C0 means 55mV */
                /* 0x340 means 65mV */
                if (vfocv_table != 0)
-                       fuelgauge_reg_write(MAX77693_REG_OCV_WR,
+                       fuelgauge_reg_write(MAX77693_REG_VFOCV,
                                        (t_raw_vcell[1] << 8) | t_raw_vcell[0]);
                else
                                        (t_raw_vcell[1] << 8) | t_raw_vcell[0]);
                else
-                       fuelgauge_reg_write(MAX77693_REG_OCV_WR,
+                       fuelgauge_reg_write(MAX77693_REG_VFOCV,
                                        ((raw_vcell[1] +
                                          0x3) << 8) | (raw_vcell[0] + 0x40));
                mdelay(500);
                                        ((raw_vcell[1] +
                                          0x3) << 8) | (raw_vcell[0] + 0x40));
                mdelay(500);
@@ -754,16 +668,6 @@ check_soc_validation:
        default:
                break;
        }
        default:
                break;
        }
-
-init_finish:
-       /* NOTICE : use soc after initializing, soc can be changed */
-       soc = max77693_fg_get_soc();
-       vfocv = max77693_fg_get_vfocv();
-       max77693_fg_check_version();
-
-       printf("%s\tvcell = %d mV, soc = %d, vfocv = %d mV\n",
-               pszfg, vcell, soc, vfocv);
-
 }
 
 static int max77693_fg_reg_dump(void)
 }
 
 static int max77693_fg_reg_dump(void)
index 3496f0a..e34656e 100644 (file)
@@ -36,6 +36,7 @@ COBJS-$(CONFIG_OMAP3_MMC) += omap3_mmc.o
 COBJS-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o
 COBJS-$(CONFIG_PXA_MMC) += pxa_mmc.o
 COBJS-$(CONFIG_S5P_MMC) += s5p_mmc.o
 COBJS-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o
 COBJS-$(CONFIG_PXA_MMC) += pxa_mmc.o
 COBJS-$(CONFIG_S5P_MMC) += s5p_mmc.o
+COBJS-$(CONFIG_S5P_DW_MMC) += s5p_dw_mmc.o
 
 COBJS  := $(COBJS-y)
 SRCS   := $(COBJS:.o=.c)
 
 COBJS  := $(COBJS-y)
 SRCS   := $(COBJS:.o=.c)
diff --git a/drivers/mmc/s5p_dw_mmc.c b/drivers/mmc/s5p_dw_mmc.c
new file mode 100644 (file)
index 0000000..7dd709e
--- /dev/null
@@ -0,0 +1,362 @@
+/*
+ * (C) Copyright 2011 SAMSUNG Electronics
+ * Jaehoon Chung <jh80.chung@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <common.h>
+#include <mmc.h>
+#include <asm/io.h>
+#include <asm/arch/dw_mmc.h>
+#include <asm/arch/mmc.h>
+#include <asm/arch/clk.h>
+
+struct mmc mmc_dev;
+struct dw_mmc_host mmc_host;
+
+static inline struct s5p_dw_mmc *s5p_get_base_mmc(int dev_index)
+{
+       /*
+        * FIXME: using MMC based offset 
+        * Based on MMC register offset 
+        **/
+       unsigned long offset = 0x40000;
+       return (struct s5p_dw_mmc *)(samsung_get_base_mmc() + offset);
+}
+
+static int dw_mmc_reset(struct dw_mmc_host *host)
+{
+       unsigned int timeout;
+       unsigned int ctrl;
+
+       ctrl = readl(&host->reg->ctrl);
+
+       writel(ctrl | (1 << 2) | (1 << 1) | (1 << 0), &host->reg->ctrl);
+
+       timeout = 1000;
+
+       do {
+               ctrl = readl(&host->reg->ctrl);
+               if (!(ctrl & 0x7))
+                       return 1;
+       } while (timeout--);
+
+       return 0;
+}
+
+static void dw_mmc_prepare_data(struct dw_mmc_host *host,
+               struct mmc_data *data)
+{
+       int timeout = 1000;
+       unsigned int ctrl;
+
+       writel((unsigned int) data->dest, &host->reg->dbaddr);
+
+       writel((1 << 1), &host->reg->ctrl);
+
+       /* reset */
+       do {
+               ctrl = readl(&host->reg->ctrl);
+               if (!(ctrl & 0x2))
+                       break;
+       } while (timeout--);
+
+       ctrl = readl(&host->reg->ctrl);
+       ctrl |= (1 << 25) | (1 << 5);
+       writel(ctrl, &host->reg->ctrl);
+
+       ctrl = readl(&host->reg->bmod);
+       ctrl |= (1 << 7) | (1 << 1);
+       writel(ctrl, &host->reg->bmod);
+
+       writel(data->blocksize, &host->reg->blksiz);
+       writel(data->blocks * data->blocksize, &host->reg->bytcnt);
+}
+
+static unsigned long dw_mmc_set_transfer_mode(struct dw_mmc_host *host,
+               struct mmc_data *data)
+{
+       unsigned long mode;
+
+       mode = (1 << 9);
+       if (data->flags & MMC_DATA_WRITE)
+               mode |= (1 << 10);
+
+       return mode;
+}
+
+static int dw_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
+               struct mmc_data *data)
+{
+       struct dw_mmc_host *host = (struct dw_mmc_host *)mmc->priv;
+       int retry = 10000;
+       unsigned int mask;
+       unsigned long flags = 0;
+       int i;
+
+       writel(0xffff, &host->reg->rintsts);
+
+       udelay(100);
+
+       if (data)
+               dw_mmc_prepare_data(host, data);
+
+       writel(cmd->cmdarg, &host->reg->cmdarg);
+
+       if (data) {
+               flags = dw_mmc_set_transfer_mode(host, data);
+       }
+
+       if ((cmd->resp_type & MMC_RSP_136) && (cmd->resp_type & MMC_RSP_BUSY))
+               return -1;
+
+       if (cmd->resp_type & MMC_RSP_PRESENT) {
+               flags |= (1 << 6);
+               if (cmd->resp_type & MMC_RSP_136) {
+                       flags |= (1 << 7);
+               }
+       }
+
+       if (cmd->resp_type & MMC_RSP_CRC)
+               flags |= (1 << 8);
+
+       flags |= (cmd->cmdidx | (1 << 31) | (1 << 13));
+       debug("cmd: %d\n", cmd->cmdidx);
+
+       writel(flags, &host->reg->cmd);
+
+       for (i = 0; i < retry; i++) {
+               mask = readl(&host->reg->rintsts);
+               if (mask & (1 << 2)) {
+                       if (!data)
+                               writel(mask, &host->reg->rintsts);
+                       break;
+               }
+       }
+
+       if (i == retry) {
+               printf("%s: waiting for interrupt status update\n", __func__);
+               return TIMEOUT;
+       }
+
+       if (mask & (1 << 8)) {
+               printf("response timeout: %08x cmd %d\n", mask, cmd->cmdidx);
+               return TIMEOUT;
+       } else if (mask & (1 << 1)) {
+               printf("response error : %08x cmd %d\n", mask, cmd->cmdidx);
+               return TIMEOUT;
+       } else if (mask & (1 << 6)) {
+               printf("response CRC error : %08x cmd %d\n", mask, cmd->cmdidx);
+               return TIMEOUT;
+       }
+
+       if (cmd->resp_type & MMC_RSP_PRESENT) {
+               if (cmd->resp_type & MMC_RSP_136) {
+                       for (i = 0; i < 4; i++) {
+                               unsigned int offset =
+                                       (unsigned int)(&host->reg->resp3 - i);
+                               cmd->response[i] = readl(offset);
+                               debug("cmd->resp[%d]: %08x\n",
+                                               i, cmd->response[i]);
+                       }
+               } else if (cmd->resp_type & MMC_RSP_BUSY) {
+                       retry = 0x10000;
+                       /* Card Busy check */
+                       for (i = 0; i < retry; i++) {
+                               if (!(readl(&host->reg->status)
+                                       & (1 << 9)))
+                                       break;
+                       }
+
+                       if (i == retry) {
+                               printf("%s: card is still busy\n", __func__);
+                               return TIMEOUT;
+                       }
+
+                       cmd->response[0] = readl(&host->reg->resp0);
+                       debug("cmd->resp[0]: %08x\n", __LINE__,cmd->response[0]);
+               } else {
+                       cmd->response[0] = readl(&host->reg->resp0);
+                               debug("cmd->resp[%d]: %08x\n",
+                                               i, cmd->response[i]);
+               }
+       }
+
+       if (data) {
+               while (1) {
+                       mask = readl(&host->reg->rintsts);
+                       if (mask & ((1 << 15) | (1 << 13) | (1 << 12) | (1 << 11) |
+                                       (1 << 7) | (1 << 9) | (1 << 10))) {
+                               printf("%s: error during transfer: 0x%08x\n",
+                                               __func__, mask);
+                               return -1;
+                       } else if (mask & (1 << 3))
+                               break;
+                       else if (mask & (1 << 2))
+                               break;
+               }
+               writel(mask, &host->reg->rintsts);
+       }
+
+       udelay(1000);
+
+       return 0;
+}
+
+static int mci_send_cmd(struct dw_mmc_host *host)
+{
+       unsigned long timeout;
+
+       writel(((1 << 31) | (1 << 21) | (1 << 13)), &host->reg->cmd);
+       timeout = 10;
+       while (readl(&host->reg->cmd) & (1 << 31)) {
+               if (timeout == 0) {
+                       printf("%s: timeout error\n",__func__);
+                       return TIMEOUT;
+               }
+               timeout--;
+               udelay(1000);
+       }
+
+       return 0;
+}
+
+static void dw_mmc_set_clock(struct dw_mmc_host *host, uint clock)
+{
+       int div;
+
+       if (clock == 0)
+               goto out;
+       else if (clock <= 400000)
+               div = 0x100;
+       else if (clock <= 20000000)
+               div = 4;
+       else if (clock <= 26000000)
+               div = 2;
+       else
+               div = 1;
+       debug("div: %d\n", div);
+
+       div >>= 1;
+
+       writel(0, &host->reg->clkena);
+       writel(0, &host->reg->clksrc);
+
+       if (mci_send_cmd(host))
+               return;
+
+       writel(div, &host->reg->clkdiv);
+
+       if (mci_send_cmd(host))
+               return;
+
+       writel((1 << 0), &host->reg->clkena);
+
+       if (mci_send_cmd(host))
+               return;
+
+out:
+       host->clock = clock;
+}
+
+/* DONE */
+static void dw_mmc_set_ios(struct mmc *mmc)
+{
+       struct dw_mmc_host *host = mmc->priv;
+       unsigned int ctrl;
+
+       printf("bus_width: %x, clock: %d\n", mmc->bus_width, mmc->clock);
+
+       dw_mmc_set_clock(host, mmc->clock);
+
+       if (mmc->bus_width == 8) {
+               ctrl = (1 << 16);
+       } else if (mmc->bus_width == 4) {
+               ctrl = (1 << 0);
+       } else
+               ctrl = (0 << 0);
+
+       /*
+        * S.LSI guide this value at CLKSEL register
+        */
+       writel(0x10001, &host->reg->clksel);
+
+       writel(ctrl, &host->reg->ctype);
+}
+
+static int dw_mmc_core_init(struct mmc *mmc)
+{
+       struct dw_mmc_host *host = (struct dw_mmc_host *)mmc->priv;
+       unsigned int ctrl;
+
+       if (!dw_mmc_reset(host)) {
+               printf("%s: dw_mmc reset timeout error!!!\n", __func__);
+               return -1;
+       }
+
+       writel(0xffffffff, &host->reg->rintsts);
+       writel(0, &host->reg->intmask);
+
+       writel(0xfffff, &host->reg->debnce);
+
+       writel((1 << 0), &host->reg->bmod);
+
+       /* unused */
+       writel(((0x2 << 28) | (0x7 << 16) | (0x8 << 0)), &host->reg->fifo);
+
+       writel(0, &host->reg->idinten);
+       writel(0xffffffff, &host->reg->tmout);
+
+       ctrl = readl(&host->reg->bmod);
+       ctrl |= (1 << 7) | (1 << 1);
+       writel(ctrl, &host->reg->bmod);
+
+       return 0;
+}
+
+static int s5p_dw_mmc_initialize(int dev_index, int bus_width)
+{
+       struct mmc *mmc;
+
+       mmc = &mmc_dev;
+
+       sprintf(mmc->name, "SAMSUNG DW_MMC");
+       mmc->priv = &mmc_host;
+       mmc->send_cmd = dw_mmc_send_cmd;
+       mmc->set_ios = dw_mmc_set_ios;
+       mmc->init = dw_mmc_core_init;
+
+       mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
+
+       mmc->host_caps = MMC_MODE_8BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS;
+
+       mmc->f_min = 400000;
+       mmc->f_max = 52000000;
+
+       mmc_host.dev_index = dev_index;
+       mmc_host.clock = 0;
+       mmc_host.reg = s5p_get_base_mmc(dev_index);
+
+       mmc_register(mmc);
+       mmc->block_dev.dev = dev_index;
+
+       return 0;
+}
+
+int s5p_mmc_init(int dev_index, int bus_width)
+{
+       return s5p_dw_mmc_initialize(dev_index, bus_width);
+}
diff --git a/drivers/mobile/Tizen_GPT_Ver10.h b/drivers/mobile/Tizen_GPT_Ver10.h
deleted file mode 100755 (executable)
index 9970b56..0000000
+++ /dev/null
@@ -1,366 +0,0 @@
-/*
- * Copyright (c) 2000 - 2011 Samsung Electronics Co., Ltd. All rights reserved.
- * Sanghee Kim <sh0130.kim@samsung.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __TIZEN_GPT_VER10_H__
-#define __TIZEN_GPT_VER10_H__
-
-#define DEFAULT_PIT_NUM                23
-#define PIT_VERSION            10
-
-struct pit_info {
-       pit_header_t hdr;
-       partition_info_t entry[DEFAULT_PIT_NUM];
-};
-
-static struct pit_info default_pit09 = {
-       .hdr = {
-               .magic = PIT_MAGIC,
-               .count = DEFAULT_PIT_NUM,
-               .gang_format = {'C', 'O', 'M', '_', 'T', 'A', 'R', '2'},
-               .model = {'T', 'I', 'Z', 'E', 'N'},
-       },
-       .entry[0] = {
-               .bin_type       = PIT_BINTYPE_AP,
-               .dev_type       = PIT_DEVTYPE_MMC,
-               .id             = 80,
-               .part_type      = PART_TYPE_DATA,
-               .filesys        = PART_FS_TYPE_BASIC,
-               .blk_start      = 0x0,
-               .blk_num        = 0x238,
-               .offset         = 0,
-               .file_size      = 0,
-               .name           = "s-boot-mmc",
-               .file_name      = "s-boot-mmc.bin",
-               .delta_name     = "",
-       },
-       .entry[1] = {
-               .bin_type       = PIT_BINTYPE_AP,
-               .dev_type       = PIT_DEVTYPE_MMC,
-               .id             = 81,
-               .part_type      = PART_TYPE_DATA,
-               .filesys        = PART_FS_TYPE_BASIC,
-               .blk_start      = 0x100,
-               .blk_num        = 0x138,
-               .offset         = 0,
-               .file_size      = 0,
-               .name           = "tzsw",
-               .file_name      = "tzdw.bin",
-               .delta_name     = "",
-       },
-       .entry[2] = {
-               .bin_type       = PIT_BINTYPE_AP,
-               .dev_type       = PIT_DEVTYPE_MMC,
-               .id             = 90,
-               .part_type      = PART_TYPE_DATA,
-               .filesys        = PART_FS_TYPE_BASIC,
-               .blk_start      = 0x0,
-               .blk_num        = 0x800,
-               .offset         = 0,
-               .file_size      = 0,
-               .name           = "u-boot-bak",
-               .file_name      = "u-boot-bak.bin",
-               .delta_name     = "",
-       },
-       .entry[3] = {
-               .bin_type       = PIT_BINTYPE_AP,
-               .dev_type       = PIT_DEVTYPE_MMC,
-               .id             = 70,
-               .part_type      = PART_TYPE_DATA,
-               .filesys        = PART_FS_TYPE_BASIC,
-               .blk_start      = 0x40,
-               .blk_num        = 0x10,
-               .offset         = 0,
-               .file_size      = 0,
-               .name           = "pit",
-               .file_name      = "Tizen_GPT_Ver10.pit",
-               .delta_name     = "",
-       },
-       .entry[4] = {
-               .bin_type       = PIT_BINTYPE_AP,
-               .dev_type       = PIT_DEVTYPE_MMC,
-               .id             = 71,
-               .part_type      = PART_TYPE_DATA,
-               .filesys        = PART_FS_TYPE_BASIC,
-               .blk_start      = 0x80,
-               .blk_num        = 0x800,
-               .offset         = 0,
-               .file_size      = 0,
-               .name           = "u-boot-mmc",
-               .file_name      = "u-boot-mmc.bin",
-               .delta_name     = "",
-       },
-       .entry[5] = {
-               .bin_type       = PIT_BINTYPE_AP,
-               .dev_type       = PIT_DEVTYPE_MMC,
-               .id             = 72,
-               .part_type      = PART_TYPE_DATA,
-               .filesys        = PART_FS_TYPE_BASIC,
-               .blk_start      = 0x880,
-               .blk_num        = 0x800,
-               .offset         = 0,
-               .file_size      = 0,
-               .name           = "u-boot-fota",
-               .file_name      = "u-boot-fota.bin",
-               .delta_name     = "",
-       },
-       .entry[6] = {
-               .bin_type       = PIT_BINTYPE_AP,
-               .dev_type       = PIT_DEVTYPE_MMC,
-               .id             = 73,
-               .part_type      = PART_TYPE_DATA,
-               .filesys        = PART_FS_TYPE_BASIC,
-               .blk_start      = 0x1080,
-               .blk_num        = 0x800,
-               .offset         = 0,
-               .file_size      = 0,
-               .name           = "s-boot-sec",
-               .file_name      = "s-boot-sec.bin",
-               .delta_name     = "",
-       },
-       .entry[7] = {
-               .bin_type       = PIT_BINTYPE_AP,
-               .dev_type       = PIT_DEVTYPE_MMC,
-               .id             = 74,
-               .part_type      = PART_TYPE_DATA,
-               .filesys        = PART_FS_TYPE_BASIC,
-               .blk_start      = 0x1180,
-               .blk_num        = 0x138,
-               .offset         = 0,
-               .file_size      = 0,
-               .name           = "tzsw-sec",
-               .file_name      = "tzsw-sec.bin",
-               .delta_name     = "",
-       },
-       .entry[8] = {
-               .bin_type       = PIT_BINTYPE_AP,
-               .dev_type       = PIT_DEVTYPE_MMC,
-               .id             = 75,
-               .part_type      = PART_TYPE_DATA,
-               .filesys        = PART_FS_TYPE_BASIC,
-               .blk_start      = 0x1880,
-               .blk_num        = 0x80,
-               .offset         = 0,
-               .file_size      = 0,
-               .name           = "params",
-               .file_name      = "params.bin",
-               .delta_name     = "",
-       },
-       .entry[9] = {
-               .bin_type       = PIT_BINTYPE_AP,
-               .dev_type       = PIT_DEVTYPE_MMC,
-               .id             = 76,
-               .part_type      = PART_TYPE_DATA,
-               .filesys        = PART_FS_TYPE_BASIC,
-               .blk_start      = 0x1900,
-               .blk_num        = 0x800,
-               .offset         = 0,
-               .file_size      = 0,
-               .name           = "MD5HDR",
-               .file_name      = "md5.img",
-               .delta_name     = "",
-       },
-       .entry[10] = {
-               .bin_type       = PIT_BINTYPE_AP,
-               .dev_type       = PIT_DEVTYPE_MMC,
-               .id             = 77,
-               .part_type      = PART_TYPE_DATA,
-               .filesys        = PART_FS_TYPE_BASIC,
-               .blk_start      = 0x2100,
-               .blk_num        = 0x400,
-               .offset         = 0,
-               .file_size      = 0,
-               .name           = "log",
-               .file_name      = "log",
-               .delta_name     = "",
-       },
-       .entry[11] = {
-               .bin_type       = PIT_BINTYPE_AP,
-               .dev_type       = PIT_DEVTYPE_MMC,
-               .id             = 78,
-               .part_type      = PART_TYPE_DATA,
-               .filesys        = PART_FS_TYPE_BASIC,
-               .blk_start      = 0x2500,
-               .blk_num        = 0x300,
-               .offset         = 0,
-               .file_size      = 0,
-               .name           = "spare",
-               .file_name      = "spare",
-               .delta_name     = "",
-       },
-       .entry[12] = {
-               .bin_type       = PIT_BINTYPE_AP,
-               .dev_type       = PIT_DEVTYPE_MMC,
-               .id             = 1,
-               .part_type      = PART_TYPE_DATA,
-               .filesys        = PART_FS_TYPE_EXT4,
-               .blk_start      = 0x2800,
-               .blk_num        = 0x4000,
-               .offset         = 0,
-               .file_size      = 0,
-               .name           = "csa",
-               .file_name      = "csa.img",
-               .delta_name     = "",
-       },
-       .entry[13] = {
-               .bin_type       = PIT_BINTYPE_AP,
-               .dev_type       = PIT_DEVTYPE_MMC,
-               .id             = 2,
-               .part_type      = PART_TYPE_DATA,
-               .filesys        = PART_FS_TYPE_EXT4,
-               .blk_start      = 0x6800,
-               .blk_num        = 0x32000,
-               .offset         = 0,
-               .file_size      = 0,
-               .name           = "boot",
-               .file_name      = "boot.img",
-               .delta_name     = "",
-       },
-       .entry[14] = {
-               .bin_type       = PIT_BINTYPE_AP,
-               .dev_type       = PIT_DEVTYPE_MMC,
-               .id             = 3,
-               .part_type      = PART_TYPE_DATA,
-               .filesys        = PART_FS_TYPE_EXT4,
-               .blk_start      = 0x38800,
-               .blk_num        = 0x32000,
-               .offset         = 0,
-               .file_size      = 0,
-               .name           = "qboot",
-               .file_name      = "qboot.img",
-               .delta_name     = "",
-       },
-       .entry[15] = {
-               .bin_type       = PIT_BINTYPE_AP,
-               .dev_type       = PIT_DEVTYPE_MMC,
-               .id             = 4,
-               .part_type      = PART_TYPE_DATA,
-               .filesys        = PART_FS_TYPE_EXT4,
-               .blk_start      = 0x6a800,
-               .blk_num        = 0x4b000,
-               .offset         = 0,
-               .file_size      = 0,
-               .name           = "csc",
-               .file_name      = "csc.img",
-               .delta_name     = "",
-       },
-       .entry[16] = {
-               .bin_type       = PIT_BINTYPE_AP,
-               .dev_type       = PIT_DEVTYPE_MMC,
-               .id             = 5,
-               .part_type      = PART_TYPE_DATA,
-               .filesys        = PART_FS_TYPE_EXT4,
-               .blk_start      = 0xb5800,
-               .blk_num        = 0x300000,
-               .offset         = 0,
-               .file_size      = 0,
-               .name           = "rootfs",
-               .file_name      = "rootfs.img",
-               .delta_name     = "",
-       },
-       .entry[17] = {
-               .bin_type       = PIT_BINTYPE_AP,
-               .dev_type       = PIT_DEVTYPE_MMC,
-               .id             = 6,
-               .part_type      = PART_TYPE_DATA,
-               .filesys        = PART_FS_TYPE_EXT4,
-               .blk_start      = 0x3b5800,
-               .blk_num        = 0x100000,
-               .offset         = 0,
-               .file_size      = 0,
-               .name           = "system-data",
-               .file_name      = "system-data.img",
-               .delta_name     = "",
-       },
-       .entry[18] = {
-               .bin_type       = PIT_BINTYPE_AP,
-               .dev_type       = PIT_DEVTYPE_MMC,
-               .id             = 7,
-               .part_type      = PART_TYPE_DATA,
-               .filesys        = PART_FS_TYPE_EXT4,
-               .blk_start      = 0x4b5800,
-               .blk_num        = 0,
-               .offset         = 0,
-               .file_size      = 0,
-               .name           = "user",
-               .file_name      = "user.img",
-               .delta_name     = "remained",
-       },
-       .entry[19] = {
-               .bin_type       = PIT_BINTYPE_AP,
-               .dev_type       = PIT_DEVTYPE_FILE,
-               .id             = 60,
-               .part_type      = PART_TYPE_DATA,
-               .filesys        = PART_FS_TYPE_EXT4,
-               .blk_start      = 0,
-               .blk_num        = 0,
-               .offset         = 0,
-               .file_size      = 0,
-               .name           = "kernel",
-               .file_name      = "uImage",
-               .delta_name     = "",
-       },
-       .entry[20] = {
-               .bin_type       = PIT_BINTYPE_AP,
-               .dev_type       = PIT_DEVTYPE_FILE,
-               .id             = 61,
-               .part_type      = PART_TYPE_DATA,
-               .filesys        = PART_FS_TYPE_EXT4,
-               .blk_start      = 0,
-               .blk_num        = 0,
-               .offset         = 0,
-               .file_size      = 0,
-               .name           = "module",
-               .file_name      = "modules.img",
-               .delta_name     = "",
-       },
-       .entry[21] = {
-               .bin_type       = PIT_BINTYPE_AP,
-               .dev_type       = PIT_DEVTYPE_FILE,
-               .id             = 62,
-               .part_type      = PART_TYPE_DATA,
-               .filesys        = PART_FS_TYPE_EXT4,
-               .blk_start      = 0,
-               .blk_num        = 0,
-               .offset         = 0,
-               .file_size      = 0,
-               .name           = "modem",
-               .file_name      = "modem.bin",
-               .delta_name     = "",
-       },
-       .entry[22] = {
-               .bin_type       = PIT_BINTYPE_AP,
-               .dev_type       = PIT_DEVTYPE_FILE,
-               .id             = 63,
-               .part_type      = PART_TYPE_DATA,
-               .filesys        = PART_FS_TYPE_EXT4,
-               .blk_start      = 0,
-               .blk_num        = 0,
-               .offset         = 0,
-               .file_size      = 0,
-               .name           = "fdt",
-               .file_name      = "tizen.dtb",
-               .delta_name     = "",
-       },
-};
-
-#endif
diff --git a/include/configs/exynos_trats2.h b/include/configs/exynos_trats2.h
deleted file mode 100644 (file)
index 0306c1d..0000000
+++ /dev/null
@@ -1,398 +0,0 @@
-/*
- * Copyright (C) 2011 Samsung Electronics
- * Sanghee Kim <sh0130.kim@samsung.com>
- *
- * Configuation settings for the SAMSUNG TRATS2 board.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-#define CONFIG_ARMV7           1       /* This is an ARM V7 CPU core */
-#define CONFIG_SAMSUNG         1       /* in a SAMSUNG core */
-#define CONFIG_S5P             1       /* which is in a S5P Family */
-#define CONFIG_EXYNOS4         1       /* which is in a EXYNOS4XXX */
-#define CONFIG_SLP_SIG         1       /* make sinature header */
-#define CONFIG_SBOOT           1       /* use the s-boot */
-
-#include <version.h>                   /* get u-boot version */
-#include <timestamp.h>
-#include <asm/arch/cpu.h>              /* get chip and board defs */
-
-#define CONFIG_CLK_ARM_800             /* APLL : 800MHz */
-#define CONFIG_CLK_BUS_DMC_200_400     /* bus clock: 200Mhz, DMC clock 400Mhz */
-
-#define CONFIG_ARCH_CPU_INIT
-#define CONFIG_SKIP_LOWLEVEL_INIT      /* u-boot is loaded by a s-boot */
-
-#define CONFIG_USE_ARCH_MEMSET
-#define CONFIG_USE_ARCH_MEMCPY
-
-#define CONFIG_SYS_CACHELINE_SIZE      32
-
-/* Keep L2 Cache Disabled */
-#define CONFIG_L2_OFF          1
-
-/*
- * Memory Map
- ********************************************
- * 0x43c00000 ~ 0x456fffff ( 26MB) : MFC0
- ********************************************
- * ..
- * 0x43d00000 ~           ( 64KB) : s-boot
- * ..
- * 0x43e00000 ~           (512KB) : u-boot
- * ..
- * 0x44c00000 ~ 0x450fffff (  5MB) : fb2
- * 0x45100000 ~ 0x4510ffff ( 64KB) : blog
- * 0x45110000 ~ 0x45110fff (  4KB) : pit
- * 0x45111000 ~ 0x456fffff (  5MB) : free
- * ..
- * 0x52000000 ~           (24 MB) : fb
- * ..
- * 0x53000000 ~            (208MB) : download
- */
-#define CONFIG_NR_DRAM_BANKS   4
-#define PHYS_SDRAM_1           0x40000000      /* LDDDR2 DMC 0 */
-#define PHYS_SDRAM_1_SIZE      (256 << 20)     /* 256 MB in CS 0 */
-#define PHYS_SDRAM_2           0x50000000      /* LPDDR2 DMC 1 */
-#define PHYS_SDRAM_2_SIZE      (256 << 20)     /* 256 MB in CS 0 */
-#define PHYS_SDRAM_3           0x60000000      /* LPDDR2 DMC 1 */
-#define PHYS_SDRAM_3_SIZE      (256 << 20)     /* 256 MB in CS 0 */
-#define PHYS_SDRAM_4           0x70000000      /* LPDDR2 DMC 1 */
-#define PHYS_SDRAM_4_SIZE      (256 << 20)     /* 256 MB in CS 0 */
-#define PHYS_SDRAM_END         0x80000000
-
-/* TOP_HIDE_BASE: end of MFC0 - free (11MB) */
-#define TOP_HIDE_BASE  (0x45700000 - (11 << 20))
-#define CONFIG_SYS_MEM_TOP_HIDE        (PHYS_SDRAM_END - TOP_HIDE_BASE)        /* use mfc0 area */
-
-#define CONFIG_SYS_SDRAM_BASE  (PHYS_SDRAM_1)
-#define CONFIG_SYS_DOWN_ADDR   0x53000000
-#define CONFIG_SYS_BACKUP_ADDR (CONFIG_SYS_DOWN_ADDR + (80 << 20))
-#define CONFIG_SYS_TEXT_BASE   0x43e00000
-#define CONFIG_SYS_FB2_ADDR    (PHYS_SDRAM_END - CONFIG_SYS_MEM_TOP_HIDE)
-#define CONFIG_SYS_BLOG_ADDR   (CONFIG_SYS_FB2_ADDR + (5 << 20))
-#define CONFIG_PIT_DOWN_ADDR   (CONFIG_SYS_BLOG_ADDR + (64 << 10))
-#define CONFIG_SYS_RSVD_ADDR   (CONFIG_PIT_DOWN_ADDR + (4 << 10))
-#define CONFIG_SYS_FREE_ADDR   (CONFIG_SYS_RSVD_ADDR + (1 << 20))
-#define CONFIG_SYS_FB_ADDR     0x52000000
-
-#define CONFIG_SYS_SEC_CONTEXT 0x2023000
-#define CONFIG_SYS_NS_BASE     0x204fc00
-
-#define CONFIG_SYS_CLK_FREQ    24000000
-
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_INITRD_TAG
-#define CONFIG_SERIAL_TAG
-#define CONFIG_REVISION_TAG
-
-/*
- * Architecture magic and machine type
- */
-#define MACH_TYPE_SMDK4412     3765
-
-#define CONFIG_DISPLAY_CPUINFO
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN  (CONFIG_ENV_SIZE + (5 << 20))
-
-/*
- * select serial console configuration
- */
-#define CONFIG_SERIAL_MULTI    1
-#define CONFIG_SERIAL2         1
-#define CONFIG_SILENT_CONSOLE  1       /* enable silent startup */
-
-/* INFORM0~3 registers are cleared by asserting XnRESET pin */
-/* INFORM4~7 registers are cleared only by power-up reset */
-#define CONFIG_INFO_ADDRESS    0x10020810      /* INFORM4 */
-#define CONFIG_INFORM_ADDRESS  0x1002080C      /* INFORM3 */
-#define CONFIG_LPM_INFORM      0x10020808      /* INFORM2 */
-
-#define CONFIG_SYS_HUSH_PARSER         /* use "hush" command parser    */
-#ifdef CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2     "> "
-#endif
-
-#define CONFIG_CMDLINE_EDITING
-
-#define CONFIG_BAUDRATE                115200
-
-/* It should define before config_cmd_default.h */
-#define CONFIG_SYS_NO_FLASH    1
-
-/***********************************************************
- * Command definition
- ***********************************************************/
-#include <config_cmd_default.h>
-
-#undef CONFIG_CMD_BOOTD
-#undef CONFIG_CMD_CONSOLE
-#undef CONFIG_CMD_ECHO
-#undef CONFIG_CMD_FPGA
-#undef CONFIG_CMD_ITEST
-#undef CONFIG_CMD_FLASH
-#undef CONFIG_CMD_IMLS
-#undef CONFIG_CMD_LOADB
-#undef CONFIG_CMD_LOADS
-#undef CONFIG_CMD_NAND
-#undef CONFIG_CMD_MISC
-#undef CONFIG_CMD_NFS
-#undef CONFIG_CMD_SOURCE
-#undef CONFIG_CMD_XIMG
-#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_MMC
-#define CONFIG_CMD_SLEEP
-#define CONFIG_CMD_DEVICE_POWER
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_GPT
-#define CONFIG_CMD_PMIC
-
-#undef CONFIG_CRC16
-
-#define CONFIG_BOOTDELAY       0
-#define CONFIG_ZERO_BOOTDELAY_CHECK
-
-#define CONFIG_FAT_WRITE
-
-/* To enable CONFIG_CMD_EXT4, CONFIG_CMD_EXT2 should be supported */
-#define CONFIG_CMD_EXT2                1
-#define CONFIG_CMD_EXT4                1
-
-/* To use the TFTPBOOT over USB, Please enable the CONFIG_CMD_NET */
-#undef CONFIG_CMD_NET
-
-/* MMC */
-#define CONFIG_GENERIC_MMC     1
-#define CONFIG_MMC             1
-#define CONFIG_S5P_MMC         1
-#define CONFIG_MMC_ASYNC       1
-#define CONFIG_MMC_DEFAULT_DEV 0
-
-#include <mobile/parts.h>
-
-#if defined(CONFIG_CMD_EXT4)
-#define FSTYPE_DEFAULT         "ext4"
-#elif defined(CONFIG_FAT_WRITE)
-#define FSTYPE_DEFAULT         "fat"
-#else
-#error "plz define default filesystem"
-#endif
-
-#if defined(CONFIG_OFFICIAL_REL)
-#define UARTPATH_DEFAULT       "cp"
-#define SILENT_DEFAULT         "on"
-#define RAMDUMP_DEFAULT                ""
-#else
-#define UARTPATH_DEFAULT       "ap"
-#define SILENT_DEFAULT         ""
-#define RAMDUMP_DEFAULT                "both"  /* save, upload, both */
-#endif
-
-#define MBRPARTS_DEFAULT       "8M("PARTS_CSA")"\
-                               ",60M("PARTS_BOOT")"\
-                               ",60M("PARTS_QBOOT")"\
-                               ",1G("PARTS_ROOT")"\
-                               ",3G("PARTS_DATA")"\
-                               ",150M("PARTS_CSC")"\
-                               ",-("PARTS_UMS")\0"
-
-
-#define CONFIG_BOOTARGS                "Please use defined boot"
-#define CONFIG_BOOTCOMMAND     "run mmcboot"
-#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
-
-#define CSAPART_DEFAULT                "/dev/mmcblk0p1"
-#define CONFIG_SLP_PART_ENV    "SLP_VAR_PART=csa " CSAPART_DEFAULT " /csa ext4 data=journal\0"
-
-#define CONFIG_SLP_EXTRA_ENV   "SLP_LCD_LEVEL=0\0" \
-                               "SLP_SWITCH_SEL=0\0" \
-                               "SLP_NATION_SEL=0\0" \
-                               "SLP_ROOTFS_NEW=0\0" \
-                               "SLP_KERNEL_NEW=0\0" \
-                               "SLP_FLAG_RTL=0\0" \
-                               "SLP_FLAG_FUS=0\0" \
-                               "SLP_FLAG_FOTA=0\0" \
-                               "SLP_FLAG_EFS_CLEAR=0\0"
-
-#define CONFIG_ENV_OVERWRITE
-#define CONFIG_ENV_AUTOSAVE
-#define CONFIG_SYS_CONSOLE_INFO_QUIET
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
-       "bootk=run loaduimage; bootm 0x40007FC0\0" \
-       "updatemmc=mmc boot 0 1 1 1; mmc write 0 0x50800000 0 0x400;" \
-               " mmc boot 0 1 1 0\0" \
-       "updatebackup=mmc boot 0 1 1 2; mmc write 0 0x51000000 0 0x400;" \
-               " mmc boot 0 1 1 0\0" \
-       "updatebootb=mmc read 0 0x51000000 0x80 0x400; run updatebackup\0" \
-       "updateuboot=mmc write 0 0x50000000 0x80 0x400\0" \
-       "updaterestore=mmc boot 0 1 1 2; mmc read 0 0x50000000 0 0x400;" \
-               "mmc boot 0 1 1 0; run updateuboot\0" \
-       "setupboot=run updatemmc; run updateuboot; run updatebootb\0" \
-       "mmcboot=set bootargs root=/dev/mmcblk0p5 rw rootfstype=ext4 rootwait " \
-               "${console} ${meminfo} ${debuginfo} " \
-               "${bootmode} ${lcdinfo} ${muicpathinfo} ${lpjinfo} ${opts} ${csamount}; " \
-               "run loaduimage; bootm 0x40007FC0\0" \
-       "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
-       "boottrace=setenv opts initcall_debug; run bootcmd\0" \
-       "verify=n\0" \
-       "rootfstype=ext4\0" \
-       "console=" CONFIG_DEFAULT_CONSOLE \
-       "mbrparts=" MBRPARTS_DEFAULT \
-       "meminfo=fbmem=" MK_STR(CONFIG_FB_SIZE) "M@" MK_STR(CONFIG_FB_ADDR) "\0" \
-       "kernelname=uImage\0" \
-       "loaduimage=" FSTYPE_DEFAULT "load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 ${kernelname}\0" \
-       "mmcdev=0\0" \
-       "mmcbootpart=2\0" \
-       "mmcrootpart=3\0" \
-       "csamount=csa=" CSAPART_DEFAULT "\0" \
-       "opts=resume=179:3\0" \
-       "uartpath=" UARTPATH_DEFAULT "\0" \
-       "usbpath=ap\0" \
-       "silent=" SILENT_DEFAULT "\0" \
-       "ramdump=" RAMDUMP_DEFAULT "\0" \
-       "ver=" U_BOOT_VERSION" (" U_BOOT_DATE " - " U_BOOT_TIME ")\0" \
-       CONFIG_SLP_PART_ENV \
-       CONFIG_SLP_EXTRA_ENV
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP    /* undef to save memory */
-#define CONFIG_SYS_PROMPT      "TRATS2 # "     /* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE      256     /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE      384     /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS     32      /* max number of command args */
-#define CONFIG_SYS_BARGSIZE    CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size */
-
-#define CONFIG_SYS_MEMTEST_START       CONFIG_SYS_SDRAM_BASE   /* memtest works on           */
-#define CONFIG_SYS_MEMTEST_END         (CONFIG_SYS_SDRAM_BASE + 0x5000000)
-#define CONFIG_SYS_LOAD_ADDR           CONFIG_SYS_TEXT_BASE
-
-#define CONFIG_SYS_HZ          1000
-
-/* valid baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
-
-/*-----------------------------------------------------------------------
- * Stack sizes
- *
- * The stack sizes are set up in start.S using the settings below
- */
-#define CONFIG_STACKSIZE       (256 << 10)     /* regular stack 256KB */
-
-#define CONFIG_SYS_MONITOR_BASE        0x00000000
-
-/*-----------------------------------------------------------------------
- * FLASH and environment organization
- */
-
-#define CONFIG_SYS_MONITOR_LEN (256 << 10)     /* Reserve 2 sectors */
-
-#define CONFIG_ENV_IS_IN_MMC   1
-#define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
-#define CONFIG_ENV_SIZE                0x4000
-#define CONFIG_ENV_OFFSET      0x310000
-#define CONFIG_ENV_UPDATE_WITH_DL      1
-#define CONFIG_EFI_PARTITION   1
-
-#define CONFIG_CMD_PIT
-#define CONFIG_PIT_IS_IN_MMC   1
-#define CONFIG_SYS_MMC_PIT_DEV CONFIG_MMC_DEFAULT_DEV
-#define CONFIG_PIT_DEFAULT_ADDR        0x8000  /* block */
-#define CONFIG_PIT_DEFAULT_SIZE        0x1000
-
-#define CONFIG_MISC_INIT_R
-#define CONFIG_BOARD_EARLY_INIT_F
-
-/* I2C */
-#include <i2c-gpio.h>
-#define CONFIG_S5P_GPIO_I2C    1
-#define CONFIG_SOFT_I2C                1
-#define CONFIG_SOFT_I2C_READ_REPEATED_START
-#define CONFIG_SYS_I2C_INIT_BOARD
-#define CONFIG_SYS_I2C_SPEED   50000
-#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_SYS_MAX_I2C_BUS 11
-
-/* POWER */
-#define CONFIG_PMIC_MAX77686
-#define CONFIG_PMIC_MAX77693
-
-/* USB Downloader */
-#define CONFIG_CMD_USBDOWN
-#define        CONFIG_S5P_USB_DMA      1       /* DMA mode */
-#define CONFIG_USB_DEVGURU     1       /* USB driver */
-#define CONFIG_S5P_USB_NON_ZLP 1       /* NON-ZLP mode on DEVGURU */
-#define CONFIG_USBD_PROG_IMAGE 1       /* progress bar option */
-
-/* PWM */
-#define CONFIG_PWM             1
-
-/* LCD */
-#define CONFIG_LCD             1
-#define CONFIG_FB_ADDR         CONFIG_SYS_FB_ADDR
-#define CONFIG_FB_SIZE         24
-#define CONFIG_S5PC1XXFB       1
-#define CONFIG_S6E8AX0         1
-#define CONFIG_DSIM            1
-/* Insert bmp animation compressed */
-#define CONFIG_CMD_BMP
-#define CONFIG_BMP_16BPP
-#define CONFIG_BMP_32BPP
-#define CONFIG_VIDEO_BMP_GZIP
-#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (700*820*4)
-
-/* RAM DUMP */
-#define CONFIG_CMD_RAMDUMP     1
-#define CONFIG_SYS_GETLOG_ADDR (PHYS_SDRAM_1 + 0x3000) /* 4KB, GETLOG */
-#define CONFIG_SYS_MAGIC_ADDR  CONFIG_SYS_GETLOG_ADDR  /* use log's magic */
-
-/* Bootloader LOG */
-#define CONFIG_LOGGER          1
-
-/* TrustZone */
-#define CONFIG_TRUSTZONE       1
-#define CONFIG_TRUSTZONE_RESERVED_DRAM (1 << 20)
-
-/* ETC */
-#define CONFIG_STOPWATCH       1
-#define CONFIG_RESET_FLAG      1       /* for watchdog reset flag */
-#define CONFIG_SLP_NEW_HEADER  1       /* for SLP mkheader */
-#define CONFIG_CMD_FSTYPE      1
-
-#define CONFIG_SYS_INIT_SP_ADDR        (CONFIG_SYS_LOAD_ADDR \
-                                - GENERATED_GBL_DATA_SIZE)
-
-#endif /* __CONFIG_H */
index 483801b..03544f1 100644 (file)
 #define SDI_2100_RCOMP0                        0x0065
 #define SDI_2100_TEMPCO                        0x0930
 
 #define SDI_2100_RCOMP0                        0x0065
 #define SDI_2100_TEMPCO                        0x0930
 
-/* parameter for SDI 3030mA 2012.10.11 */
-#define SDI_3000_RCOMP0                        0x0059
-#define SDI_3000_TEMPCO                        0x0C1F
-
 enum battery_type {
        BATTERY_UNKNOWN = 0,
        BATTERY_SDI_1750,
        BATTERY_SDI_2100,
 enum battery_type {
        BATTERY_UNKNOWN = 0,
        BATTERY_SDI_1750,
        BATTERY_SDI_2100,
-       BATTERY_SDI_3000,
 };
 
 struct table_soc_data {
 };
 
 struct table_soc_data {
index 0a6a8d3..00bbb40 100644 (file)
                                 MAX77686_EN32KHZ | \
                                 MAX77686_EN32KHZ_LJM)
 
                                 MAX77686_EN32KHZ | \
                                 MAX77686_EN32KHZ_LJM)
 
+#define MAX77686_STATUS1_JIGONB        (1 << 1)
+#define MAX77686_PWRON_ACOKB   (1 << 2)
+
+/* MAX77686 PMIC Registers. */
+#define MAX77686_DEVICE_ID             0x00
+#define MAX77686_INTSRC                        0x01
+#define MAX77686_INT1                  0x02
+#define MAX77686_INT2                  0x03
+#define MAX77686_INT1MSK               0x04
+#define MAX77686_INT2MSK               0x05
+#define MAX77686_STATUS1               0x06
+#define MAX77686_STATUS2               0x07
+#define MAX77686_PWRON                 0x08
+#define MAX77686_ONOFF_DELAY   0x09
+#define MAX77686_MRSTB                 0x0A
+
 typedef enum {
        OPMODE_OFF,
        OPMODE_STANDBY,
 typedef enum {
        OPMODE_OFF,
        OPMODE_STANDBY,
@@ -42,23 +58,28 @@ typedef enum {
        OPMODE_ON,
 } opmode_type;
 
        OPMODE_ON,
 } opmode_type;
 
-#ifdef CONFIG_PMIC_MAX77686
+enum {
+       PWRONR,
+       PWRONF,
+       PWRON1S,
+};
+
+struct max77686_platform_data {
+       struct s5p_gpio_bank *bank;
+       unsigned int uart_sel;
+};
+
 void max77686_bus_init(int bus_num);
 void max77686_bus_init(int bus_num);
-#else
-#define max77686_bus_init(x) do {} while(0)
-#endif
+int max77686_probe(void);
 int max77686_rtc_init(void);
 int max77686_rtc_init(void);
-int max77686_init(void);
-int max77686_check_pwron_pwrkey(void);
-int max77686_check_pwron_wtsr(void);
-int max77686_check_pwron_smpl(void);
-int max77686_check_pwrkey(void);
-int max77686_clear_irq(void);
+int max77686_get_irq(int irq);
+int max77686_get_irq_booton(int irq);
 int max77686_set_ldo_voltage(int ldo, ulong uV);
 int max77686_set_buck_voltage(int buck, ulong uV);
 int max77686_set_ldo_mode(int ldo, opmode_type mode);
 int max77686_set_buck_mode(int buck, opmode_type mode);
 int max77686_set_32khz(unsigned char mode);
 int max77686_set_ldo_voltage(int ldo, ulong uV);
 int max77686_set_buck_voltage(int buck, ulong uV);
 int max77686_set_ldo_mode(int ldo, opmode_type mode);
 int max77686_set_buck_mode(int buck, opmode_type mode);
 int max77686_set_32khz(unsigned char mode);
+void max77686_set_platform_data(struct max77686_platform_data *pd);
 void show_pwron_source(char *buf);
 int max77686_check_acokb_pwron(void);
 
 void show_pwron_source(char *buf);
 int max77686_check_acokb_pwron(void);
 
index 8d830f6..ed86c3a 100755 (executable)
@@ -53,21 +53,15 @@ enum {
        MAX77693_ADC_OPEN               = 0x1f
 };
 
        MAX77693_ADC_OPEN               = 0x1f
 };
 
-#ifdef CONFIG_PMIC_MAX77693
-void max77693_pmic_bus_init(int bus_num);
-void max77693_muic_bus_init(int bus_num);
-void max77693_fg_bus_init(int bus_num);
-#else
-#define max77693_pmic_bus_init(x) do {} while(0)
-#define max77693_muic_bus_init(x) do {} while(0)
-#define max77693_fg_bus_init(x) do {} while(0)
-#endif
 int max77693_init(void);
 int max77693_init(void);
+void max77693_pmic_bus_init(int bus_num);
 int max77693_pmic_probe(void);
 int max77693_charger_detbat(void);
 int max77693_pmic_probe(void);
 int max77693_charger_detbat(void);
+void max77693_muic_bus_init(int bus_num);
 int max77693_muic_probe(void);
 int max77693_muic_check(void);
 int max77693_muic_get_adc(void);
 int max77693_muic_probe(void);
 int max77693_muic_check(void);
 int max77693_muic_get_adc(void);
+void max77693_fg_bus_init(int bus_num);
 int max77693_fg_probe(void);
 void max77693_fg_init(enum battery_type batt_type, int charger_type);
 u32 max77693_fg_get_soc(void);
 int max77693_fg_probe(void);
 void max77693_fg_init(enum battery_type batt_type, int charger_type);
 u32 max77693_fg_get_soc(void);