Driver workarounds for game bugs can be easily broken. This one
shouldn't be applied to meta shaders and this restores previous logic.
Fixes:
da32cbb5c69 ("aco: fix missing uses of MRT output flags")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20637>
out.is_int8 = (ctx->options->key.ps.epilog.color_is_int8 >> idx) & 1;
out.is_int10 = (ctx->options->key.ps.epilog.color_is_int10 >> idx) & 1;
out.enable_mrt_output_nan_fixup =
out.is_int8 = (ctx->options->key.ps.epilog.color_is_int8 >> idx) & 1;
out.is_int10 = (ctx->options->key.ps.epilog.color_is_int10 >> idx) & 1;
out.enable_mrt_output_nan_fixup =
- (ctx->options->key.ps.epilog.enable_mrt_output_nan_fixup >> idx) & 1;
+ (ctx->options->enable_mrt_output_nan_fixup >> idx) & 1;
for (unsigned c = 0; c < 4; ++c) {
if (out.write_mask & (1 << c)) {
for (unsigned c = 0; c < 4; ++c) {
if (out.write_mask & (1 << c)) {
bool record_ir;
bool record_stats;
bool has_ls_vgpr_init_bug;
bool record_ir;
bool record_stats;
bool has_ls_vgpr_init_bug;
+ uint8_t enable_mrt_output_nan_fixup;
bool wgp_mode;
enum radeon_family family;
enum amd_gfx_level gfx_level;
bool wgp_mode;
enum radeon_family family;
enum amd_gfx_level gfx_level;
ASSIGN_FIELD(record_ir);
ASSIGN_FIELD(record_stats);
ASSIGN_FIELD(has_ls_vgpr_init_bug);
ASSIGN_FIELD(record_ir);
ASSIGN_FIELD(record_stats);
ASSIGN_FIELD(has_ls_vgpr_init_bug);
+ ASSIGN_FIELD(enable_mrt_output_nan_fixup);
ASSIGN_FIELD(wgp_mode);
ASSIGN_FIELD(family);
ASSIGN_FIELD(gfx_level);
ASSIGN_FIELD(wgp_mode);
ASSIGN_FIELD(family);
ASSIGN_FIELD(gfx_level);
(ctx->options->key.ps.epilog.spi_shader_col_format >> (4 * index)) & 0xf;
bool is_int8 = (ctx->options->key.ps.epilog.color_is_int8 >> index) & 1;
bool is_int10 = (ctx->options->key.ps.epilog.color_is_int10 >> index) & 1;
(ctx->options->key.ps.epilog.spi_shader_col_format >> (4 * index)) & 0xf;
bool is_int8 = (ctx->options->key.ps.epilog.color_is_int8 >> index) & 1;
bool is_int10 = (ctx->options->key.ps.epilog.color_is_int10 >> index) & 1;
- bool enable_mrt_output_nan_fixup =
- (ctx->options->key.ps.epilog.enable_mrt_output_nan_fixup >> index) & 1;
+ bool enable_mrt_output_nan_fixup = (ctx->options->enable_mrt_output_nan_fixup >> index) & 1;
LLVMValueRef (*packf)(struct ac_llvm_context * ctx, LLVMValueRef args[2]) = NULL;
LLVMValueRef (*packi)(struct ac_llvm_context * ctx, LLVMValueRef args[2], unsigned bits,
LLVMValueRef (*packf)(struct ac_llvm_context * ctx, LLVMValueRef args[2]) = NULL;
LLVMValueRef (*packi)(struct ac_llvm_context * ctx, LLVMValueRef args[2], unsigned bits,
options->check_ir = device->instance->debug_flags & RADV_DEBUG_CHECKIR;
options->address32_hi = device->physical_device->rad_info.address32_hi;
options->has_ls_vgpr_init_bug = device->physical_device->rad_info.has_ls_vgpr_init_bug;
options->check_ir = device->instance->debug_flags & RADV_DEBUG_CHECKIR;
options->address32_hi = device->physical_device->rad_info.address32_hi;
options->has_ls_vgpr_init_bug = device->physical_device->rad_info.has_ls_vgpr_init_bug;
- options->enable_mrt_output_nan_fixup =
- !is_meta_shader && options->key.ps.epilog.enable_mrt_output_nan_fixup;
+
+ if (!is_meta_shader)
+ options->enable_mrt_output_nan_fixup = options->key.ps.epilog.enable_mrt_output_nan_fixup;
}
static struct radv_shader *
}
static struct radv_shader *