+ Name (RBUF, ResourceTemplate()
+ {
+ /*
+ * Shadow registers in SRAM for PMIC:
+ * SRAM PMIC register
+ * --------------------
+ * 0x00- Unknown
+ * 0x03 THRMIRQ (0x04)
+ * 0x04 BCUIRQ (0x05)
+ * 0x05 ADCIRQ (0x06)
+ * 0x06 CHGRIRQ0 (0x07)
+ * 0x07 CHGRIRQ1 (0x08)
+ * 0x08- Unknown
+ * 0x0a PBSTATUS (0x27)
+ * 0x0b- Unknown
+ */
+ Memory32Fixed(ReadWrite, 0xFFFFF610, 0x00000010)
+ Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 30 }
+ Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 23 }
+ Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 52 }
+ Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 51 }
+ Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 50 }
+ Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 27 }
+ Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 49 }
+ })
+