- if(h8300hmode||h8300smode)
- {
- register unsigned char *_src,*_dst;
- unsigned int count = (code->opcode==O(O_EEPMOV, SW))?cpu.regs[R4_REGNUM]&0xffff:
- cpu.regs[R4_REGNUM]&0xff;
-
- _src = cpu.regs[R5_REGNUM] < memory_size ? cpu.memory+cpu.regs[R5_REGNUM] :
- cpu.eightbit + (cpu.regs[R5_REGNUM] & 0xff);
- if((_src+count)>=(cpu.memory+memory_size))
- {
- if((_src+count)>=(cpu.eightbit+0x100))
- goto illegal;
- }
- _dst = cpu.regs[R6_REGNUM] < memory_size ? cpu.memory+cpu.regs[R6_REGNUM] :
+ if(h8300hmode||h8300smode)
+ {
+ register unsigned char *_src,*_dst;
+ unsigned int count = (code->opcode==O(O_EEPMOV, SW))?cpu.regs[R4_REGNUM]&0xffff:
+ cpu.regs[R4_REGNUM]&0xff;
+
+ _src = cpu.regs[R5_REGNUM] < memory_size ? cpu.memory+cpu.regs[R5_REGNUM] :
+ cpu.eightbit + (cpu.regs[R5_REGNUM] & 0xff);
+ if((_src+count)>=(cpu.memory+memory_size))
+ {
+ if((_src+count)>=(cpu.eightbit+0x100))
+ goto illegal;
+ }
+ _dst = cpu.regs[R6_REGNUM] < memory_size ? cpu.memory+cpu.regs[R6_REGNUM] :
- if((_dst+count)>=(cpu.memory+memory_size))
- {
- if((_dst+count)>=(cpu.eightbit+0x100))
- goto illegal;
- }
- memcpy(_dst,_src,count);
-
- cpu.regs[R5_REGNUM]+=count;
- cpu.regs[R6_REGNUM]+=count;
- cpu.regs[R4_REGNUM]&=(code->opcode==O(O_EEPMOV, SW))?(~0xffff):(~0xff);
- cycles += 2*count;
- goto next;
- }
- goto illegal;
+ if((_dst+count)>=(cpu.memory+memory_size))
+ {
+ if((_dst+count)>=(cpu.eightbit+0x100))
+ goto illegal;
+ }
+ memcpy(_dst,_src,count);
+
+ cpu.regs[R5_REGNUM]+=count;
+ cpu.regs[R6_REGNUM]+=count;
+ cpu.regs[R4_REGNUM]&=(code->opcode==O(O_EEPMOV, SW))?(~0xffff):(~0xff);
+ cycles += 2*count;
+ goto next;
+ }
+ goto illegal;
the macros here instead of looking for .../sys/wait.h. */
#define SIM_WIFEXITED(v) (((v) & 0xff) == 0)
#define SIM_WIFSIGNALED(v) (((v) & 0x7f) > 0 && (((v) & 0x7f) < 0x7f))
the macros here instead of looking for .../sys/wait.h. */
#define SIM_WIFEXITED(v) (((v) & 0xff) == 0)
#define SIM_WIFSIGNALED(v) (((v) & 0x7f) > 0 && (((v) & 0x7f) < 0x7f))
OBITOP (O_BNOT, 1, 1, ea ^= m);
OBITOP (O_BTST, 1, 0, nz = ea & m);
OBITOP (O_BCLR, 1, 1, ea &= ~m);
OBITOP (O_BNOT, 1, 1, ea ^= m);
OBITOP (O_BTST, 1, 0, nz = ea & m);
OBITOP (O_BCLR, 1, 1, ea &= ~m);
- OBITOP (O_BSET, 1, 1, ea |= m);
+ OBITOP (O_BSET, 1, 1, ea |= m);
OBITOP (O_BLD, 1, 0, c = ea & m);
OBITOP (O_BILD, 1, 0, c = !(ea & m));
OBITOP (O_BST, 1, 1, ea &= ~m;
OBITOP (O_BLD, 1, 0, c = ea & m);
OBITOP (O_BILD, 1, 0, c = !(ea & m));
OBITOP (O_BST, 1, 1, ea &= ~m;
- if( !h8300smode || code->src.type != X (OP_REG, SL) )
- goto illegal;
- switch(code->src.reg)
- {
- case R0_REGNUM:
- case R1_REGNUM:
- case R4_REGNUM:
- case R5_REGNUM:
- break;
- default:
- goto illegal;
- }
- res = fetch (&code->src);
- store (&code->src,res|0x80);
+ if( !h8300smode || code->src.type != X (OP_REG, SL) )
+ goto illegal;
+ switch(code->src.reg)
+ {
+ case R0_REGNUM:
+ case R1_REGNUM:
+ case R4_REGNUM:
+ case R5_REGNUM:
+ break;
+ default:
+ goto illegal;
+ }
+ res = fetch (&code->src);
+ store (&code->src,res|0x80);