Depending on if we have DDR2 or DDR3 on the board we will need to call
ddr_pll_config with a different value. This call can be delayed
slightly to the point where we know which type of memory we have.
Signed-off-by: Tom Rini <trini@ti.com>
-static void ddr_pll_config(void)
+void ddr_pll_config(unsigned int ddrpll_m)
{
u32 clkmode, clksel, div_m2;
{
u32 clkmode, clksel, div_m2;
;
clksel = clksel & (~CLK_SEL_MASK);
;
clksel = clksel & (~CLK_SEL_MASK);
- clksel = clksel | ((DDRPLL_M << CLK_SEL_SHIFT) | DDRPLL_N);
+ clksel = clksel | ((ddrpll_m << CLK_SEL_SHIFT) | DDRPLL_N);
writel(clksel, &cmwkup->clkseldpllddr);
div_m2 = div_m2 & CLK_DIV_SEL;
writel(clksel, &cmwkup->clkseldpllddr);
div_m2 = div_m2 & CLK_DIV_SEL;
mpu_pll_config();
core_pll_config();
per_pll_config();
mpu_pll_config();
core_pll_config();
per_pll_config();
/* Enable the required interconnect clocks */
enable_interface_clocks();
/* Enable the required interconnect clocks */
enable_interface_clocks();
#include <asm/arch/ddr_defs.h>
#include <asm/arch/hardware.h>
#include <asm/arch/clock.h>
#include <asm/arch/ddr_defs.h>
#include <asm/arch/hardware.h>
#include <asm/arch/clock.h>
+#include <asm/arch/sys_proto.h>
#include <asm/io.h>
#include <asm/emif.h>
#include <asm/io.h>
#include <asm/emif.h>
enable_emif_clocks();
if (ddr_type == EMIF_REG_SDRAM_TYPE_DDR2) {
enable_emif_clocks();
if (ddr_type == EMIF_REG_SDRAM_TYPE_DDR2) {
config_vtp();
config_cmd_ctrl(&ddr2_cmd_ctrl_data);
config_vtp();
config_cmd_ctrl(&ddr2_cmd_ctrl_data);
u32 get_device_type(void);
void setup_clocks_for_console(void);
u32 get_device_type(void);
void setup_clocks_for_console(void);
+void ddr_pll_config(unsigned int ddrpll_M);