Move all rk3128 u-boot specific properties in separate dtsi files.
Sort emmc node.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+
+#include "rk3128-u-boot.dtsi"
+
+&emmc {
+ u-boot,dm-pre-reloc;
+};
+&emmc {
+ fifo-mode;
+ status = "okay";
+};
+
-&emmc {
- fifo-mode;
- status = "okay";
-};
-
&pinctrl {
usb_otg {
otg_vbus_drv: host-vbus-drv {
&pinctrl {
usb_otg {
otg_vbus_drv: host-vbus-drv {
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+
+#include "rockchip-u-boot.dtsi"
+
+/ {
+ dmc: dmc@20004000 {
+ compatible = "rockchip,rk3128-dmc", "syscon";
+ reg = <0x0 0x20004000 0x0 0x1000>;
+ u-boot,dm-pre-reloc;
+ };
+};
+
+&cru {
+ u-boot,dm-pre-reloc;
+};
+
+&grf {
+ u-boot,dm-pre-reloc;
+};
clock-names = "clk_nandc", "g_clk_nandc", "hclk_nandc";
};
clock-names = "clk_nandc", "g_clk_nandc", "hclk_nandc";
};
- dmc: dmc@20004000 {
- u-boot,dm-pre-reloc;
- compatible = "rockchip,rk3128-dmc", "syscon";
- reg = <0x0 0x20004000 0x0 0x1000>;
- };
-
cru: clock-controller@20000000 {
cru: clock-controller@20000000 {
compatible = "rockchip,rk3128-cru";
reg = <0x20000000 0x1000>;
rockchip,grf = <&grf>;
compatible = "rockchip,rk3128-cru";
reg = <0x20000000 0x1000>;
rockchip,grf = <&grf>;
};
emmc: dwmmc@1021c000 {
};
emmc: dwmmc@1021c000 {
compatible = "rockchip,rk3128-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x1021c000 0x4000>;
max-frequency = <150000000>;
compatible = "rockchip,rk3128-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x1021c000 0x4000>;
max-frequency = <150000000>;
};
grf: syscon@20008000 {
};
grf: syscon@20008000 {
compatible = "rockchip,rk3128-grf", "syscon";
reg = <0x20008000 0x1000>;
};
compatible = "rockchip,rk3128-grf", "syscon";
reg = <0x20008000 0x1000>;
};