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x86: Issue SMI to finalize Coreboot in final stage
author
Duncan Laurie
<dlaurie@chromium.org>
Sat, 3 Nov 2012 11:41:35 +0000
(11:41 +0000)
committer
Simon Glass
<sjg@chromium.org>
Thu, 6 Dec 2012 22:30:43 +0000
(14:30 -0800)
This will write magic value to APMC command port which
will trigger an SMI and cause coreboot to lock down
the ME, chipset, and CPU.
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
arch/x86/cpu/coreboot/coreboot.c
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diff --git
a/arch/x86/cpu/coreboot/coreboot.c
b/arch/x86/cpu/coreboot/coreboot.c
index
f73977f
..
1c8a007
100644
(file)
--- a/
arch/x86/cpu/coreboot/coreboot.c
+++ b/
arch/x86/cpu/coreboot/coreboot.c
@@
-118,5
+118,9
@@
int board_final_cleanup(void)
enable_caches();
}
enable_caches();
}
+ /* Issue SMI to Coreboot to lock down ME and registers */
+ printf("Finalizing Coreboot\n");
+ outb(0xcb, 0xb2);
+
return 0;
}
return 0;
}