exynos: update tzpc to make it common for exynos4 and exynos5

This requires that cpu_is_exynos4/5 should be made available before tzpc_init.
Hence this patch also makes necessary changes to have cpu_info in spl and
invokes arch_cpu_init before tzpc_init in low_level_init.S for smdk5250.

Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
Acked-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

diff --git a/arch/arm/cpu/armv7/exynos/tzpc.c b/arch/arm/cpu/armv7/exynos/tzpc.c
index 81adb4b..f5e8e9c 100644 (file)
--- a/arch/arm/cpu/armv7/exynos/tzpc.c
+++ b/arch/arm/cpu/armv7/exynos/tzpc.c
@@ -22,6 +22,7 @@
  * MA 02111-1307 USA
  */
 
  * MA 02111-1307 USA
  */
 

+#include <common.h>

 #include <asm/arch/tzpc.h>
 #include <asm/io.h>
 
 #include <asm/arch/tzpc.h>
 #include <asm/io.h>
 


@@ -29,20 +30,28 @@
 void tzpc_init(void)
 {
        struct exynos_tzpc *tzpc;
 void tzpc_init(void)
 {
        struct exynos_tzpc *tzpc;

-       unsigned int addr;
+       unsigned int addr, start = 0, end = 0;

 
 

-       for (addr = TZPC0_BASE; addr <= TZPC9_BASE; addr += TZPC_BASE_OFFSET) {
+       start = samsung_get_base_tzpc();
+
+       if (cpu_is_exynos5())
+               end = start + ((EXYNOS5_NR_TZPC_BANKS - 1) * TZPC_BASE_OFFSET);
+       else if (cpu_is_exynos4())
+               end = start + ((EXYNOS4_NR_TZPC_BANKS - 1) * TZPC_BASE_OFFSET);
+
+       for (addr = start; addr <= end; addr += TZPC_BASE_OFFSET) {

                tzpc = (struct exynos_tzpc *)addr;
 
                tzpc = (struct exynos_tzpc *)addr;
 

-               if (addr == TZPC0_BASE)
+               if (addr == start)

                        writel(R0SIZE, &tzpc->r0size);
 
                writel(DECPROTXSET, &tzpc->decprot0set);
                writel(DECPROTXSET, &tzpc->decprot1set);
 
                        writel(R0SIZE, &tzpc->r0size);
 
                writel(DECPROTXSET, &tzpc->decprot0set);
                writel(DECPROTXSET, &tzpc->decprot1set);
 

-               if (addr != TZPC9_BASE) {
-                       writel(DECPROTXSET, &tzpc->decprot2set);
-                       writel(DECPROTXSET, &tzpc->decprot3set);
-               }
+               if (cpu_is_exynos5() && (addr == end))
+                       break;
+
+               writel(DECPROTXSET, &tzpc->decprot2set);
+               writel(DECPROTXSET, &tzpc->decprot3set);

        }
 }
        }
 }

diff --git a/arch/arm/cpu/armv7/s5p-common/Makefile b/arch/arm/cpu/armv7/s5p-common/Makefile
index 1705399..0c38bd0 100644 (file)
--- a/arch/arm/cpu/armv7/s5p-common/Makefile
+++ b/arch/arm/cpu/armv7/s5p-common/Makefile
@@ -26,9 +26,11 @@ include $(TOPDIR)/config.mk
 LIB    = $(obj)libs5p-common.o
 
 COBJS-y                += cpu_info.o
 LIB    = $(obj)libs5p-common.o
 
 COBJS-y                += cpu_info.o

+ifndef CONFIG_SPL_BUILD

 COBJS-y                += timer.o
 COBJS-y                += sromc.o
 COBJS-$(CONFIG_PWM)    += pwm.o
 COBJS-y                += timer.o
 COBJS-y                += sromc.o
 COBJS-$(CONFIG_PWM)    += pwm.o

+endif

 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS-y) $(SOBJS))

diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h
index f76e489..36b98c8 100644 (file)
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -38,6 +38,7 @@
 #define EXYNOS4_CLOCK_BASE             0x10030000
 #define EXYNOS4_SYSTIMER_BASE          0x10050000
 #define EXYNOS4_WATCHDOG_BASE          0x10060000
 #define EXYNOS4_CLOCK_BASE             0x10030000
 #define EXYNOS4_SYSTIMER_BASE          0x10050000
 #define EXYNOS4_WATCHDOG_BASE          0x10060000

+#define EXYNOS4_TZPC_BASE              0x10110000

 #define EXYNOS4_MIU_BASE               0x10600000
 #define EXYNOS4_DMC0_BASE              0x10400000
 #define EXYNOS4_DMC1_BASE              0x10410000
 #define EXYNOS4_MIU_BASE               0x10600000
 #define EXYNOS4_DMC0_BASE              0x10400000
 #define EXYNOS4_DMC1_BASE              0x10410000


@@ -74,6 +75,7 @@
 #define EXYNOS4X12_CLOCK_BASE          0x10030000
 #define EXYNOS4X12_SYSTIMER_BASE       0x10050000
 #define EXYNOS4X12_WATCHDOG_BASE       0x10060000
 #define EXYNOS4X12_CLOCK_BASE          0x10030000
 #define EXYNOS4X12_SYSTIMER_BASE       0x10050000
 #define EXYNOS4X12_WATCHDOG_BASE       0x10060000

+#define EXYNOS4X12_TZPC_BASE           0x10110000

 #define EXYNOS4X12_DMC0_BASE           0x10600000
 #define EXYNOS4X12_DMC1_BASE           0x10610000
 #define EXYNOS4X12_GPIO_PART4_BASE     0x106E0000
 #define EXYNOS4X12_DMC0_BASE           0x10600000
 #define EXYNOS4X12_DMC1_BASE           0x10610000
 #define EXYNOS4X12_GPIO_PART4_BASE     0x106E0000


@@ -107,6 +109,7 @@
 #define EXYNOS5_POWER_BASE             0x10040000
 #define EXYNOS5_SWRESET                        0x10040400
 #define EXYNOS5_SYSREG_BASE            0x10050000
 #define EXYNOS5_POWER_BASE             0x10040000
 #define EXYNOS5_SWRESET                        0x10040400
 #define EXYNOS5_SYSREG_BASE            0x10050000

+#define EXYNOS5_TZPC_BASE              0x10100000

 #define EXYNOS5_WATCHDOG_BASE          0x101D0000
 #define EXYNOS5_ACE_SFR_BASE            0x10830000
 #define EXYNOS5_DMC_PHY0_BASE          0x10C00000
 #define EXYNOS5_WATCHDOG_BASE          0x101D0000
 #define EXYNOS5_ACE_SFR_BASE            0x10830000
 #define EXYNOS5_DMC_PHY0_BASE          0x10C00000


@@ -233,6 +236,7 @@ SAMSUNG_BASE(watchdog, WATCHDOG_BASE)
 SAMSUNG_BASE(power, POWER_BASE)
 SAMSUNG_BASE(spi, SPI_BASE)
 SAMSUNG_BASE(spi_isp, SPI_ISP_BASE)
 SAMSUNG_BASE(power, POWER_BASE)
 SAMSUNG_BASE(spi, SPI_BASE)
 SAMSUNG_BASE(spi_isp, SPI_ISP_BASE)

+SAMSUNG_BASE(tzpc, TZPC_BASE)

 #endif
 
 #endif /* _EXYNOS4_CPU_H */
 #endif
 
 #endif /* _EXYNOS4_CPU_H */

diff --git a/arch/arm/include/asm/arch-exynos/tzpc.h b/arch/arm/include/asm/arch-exynos/tzpc.h
index 050ad70..4d9c3a3 100644 (file)
--- a/arch/arm/include/asm/arch-exynos/tzpc.h
+++ b/arch/arm/include/asm/arch-exynos/tzpc.h
@@ -48,18 +48,10 @@ struct exynos_tzpc {
        unsigned int pcellid3;
 };
 
        unsigned int pcellid3;
 };
 

-/* TZPC : Register Offsets */
-#define TZPC0_BASE             0x10100000
-#define TZPC1_BASE             0x10110000
-#define TZPC2_BASE             0x10120000
-#define TZPC3_BASE             0x10130000
-#define TZPC4_BASE             0x10140000
-#define TZPC5_BASE             0x10150000
-#define TZPC6_BASE             0x10160000
-#define TZPC7_BASE             0x10170000
-#define TZPC8_BASE             0x10180000
-#define TZPC9_BASE             0x10190000
+#define EXYNOS4_NR_TZPC_BANKS          6
+#define EXYNOS5_NR_TZPC_BANKS          10

 
 

+/* TZPC : Register Offsets */

 #define TZPC_BASE_OFFSET               0x10000
 
 /*
 #define TZPC_BASE_OFFSET               0x10000
 
 /*

diff --git a/board/samsung/smdk5250/lowlevel_init.S b/board/samsung/smdk5250/lowlevel_init.S
index bc6cb6f..edc565e 100644 (file)
--- a/board/samsung/smdk5250/lowlevel_init.S
+++ b/board/samsung/smdk5250/lowlevel_init.S
@@ -75,12 +75,14 @@ lowlevel_init:
        bl      mem_ctrl_init
 
 1:
        bl      mem_ctrl_init
 
 1:

+       bl      arch_cpu_init

        bl      tzpc_init
        ldmia   r13!, {ip,pc}
 
 wakeup_reset:
        bl      system_clock_init
        bl      mem_ctrl_init
        bl      tzpc_init
        ldmia   r13!, {ip,pc}
 
 wakeup_reset:
        bl      system_clock_init
        bl      mem_ctrl_init

+       bl      arch_cpu_init

        bl      tzpc_init
 
 exit_wakeup:
        bl      tzpc_init
 
 exit_wakeup:

diff --git a/spl/Makefile b/spl/Makefile
index 8b655c4..09752bf 100644 (file)
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -102,6 +102,10 @@ ifneq ($(CONFIG_MX23)$(CONFIG_MX35),)
 LIBS-y += arch/$(ARCH)/imx-common/libimx-common.o
 endif
 
 LIBS-y += arch/$(ARCH)/imx-common/libimx-common.o
 endif
 

+ifeq ($(SOC),exynos)
+LIBS-y += $(CPUDIR)/s5p-common/libs5p-common.o
+endif
+

 # Add GCC lib
 ifeq ("$(USE_PRIVATE_LIBGCC)", "yes")
 PLATFORM_LIBGCC = $(SPLTREE)/arch/$(ARCH)/lib/libgcc.o
 # Add GCC lib
 ifeq ("$(USE_PRIVATE_LIBGCC)", "yes")
 PLATFORM_LIBGCC = $(SPLTREE)/arch/$(ARCH)/lib/libgcc.o