Make a few adjustments to allow us to build an SPL image for coreboot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
obj-$(CONFIG_INTEL_QUEENSBAY) += queensbay/
obj-$(CONFIG_INTEL_TANGIER) += tangier/
obj-$(CONFIG_APIC) += lapic.o ioapic.o
obj-$(CONFIG_INTEL_QUEENSBAY) += queensbay/
obj-$(CONFIG_INTEL_TANGIER) += tangier/
obj-$(CONFIG_APIC) += lapic.o ioapic.o
-obj-$(CONFIG_$(SPL_TPL_)X86_32BIT_INIT) += irq.o
obj-$(CONFIG_$(SPL_TPL_)ACPI_GPE) += acpi_gpe.o
obj-$(CONFIG_QFW) += qfw_cpu.o
obj-$(CONFIG_$(SPL_TPL_)ACPI_GPE) += acpi_gpe.o
obj-$(CONFIG_QFW) += qfw_cpu.o
+ifndef CONFIG_SYS_COREBOOT
+obj-$(CONFIG_$(SPL_TPL_)X86_32BIT_INIT) += irq.o
+endif
ifndef CONFIG_$(SPL_)X86_64
obj-$(CONFIG_SMP) += mp_init.o
endif
ifndef CONFIG_$(SPL_)X86_64
obj-$(CONFIG_SMP) += mp_init.o
endif
# (C) Copyright 2002
# Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
# (C) Copyright 2002
# Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
+endif
+ifdef CONFIG_SPL_BUILD
+obj-y += coreboot_spl.o
+else
+obj-y += sdram.o
+endif
obj-y += coreboot.o
obj-y += tables.o
obj-y += coreboot.o
obj-y += tables.o
- return x86_cpu_init_f();
+ return IS_ENABLED(CONFIG_X86_RUN_64BIT) ? x86_cpu_reinit_f() :
+ x86_cpu_init_f();
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Google LLC
+ */
+
+#include <common.h>
+#include <init.h>
+
+int dram_init(void)
+{
+ return 0;
+}
ifdef CONFIG_SPL
ifndef CONFIG_SPL_BUILD
ifdef CONFIG_SPL
ifndef CONFIG_SPL_BUILD
+ifndef CONFIG_SYS_COREBOOT
obj-y += cpu_from_spl.o
endif
endif
obj-y += cpu_from_spl.o
endif
endif
+#ifndef CONFIG_SYS_COREBOOT
int checkcpu(void)
{
return 0;
int checkcpu(void)
{
return 0;
int x86_cpu_reinit_f(void)
{
int x86_cpu_reinit_f(void)
{