cosmetic: rockchip: rk3288: rename rkclk_configure_cpu

The function is very specific to the rk3288 in its arguments
referencing the rk3288 cru and grf and every other rockchip soc
has differing cru and grf registers. So make that function naming
explicit.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h
index 317e512..4bebd62 100644 (file)
--- a/arch/arm/include/asm/arch-rockchip/clock.h
+++ b/arch/arm/include/asm/arch-rockchip/clock.h
@@ -65,6 +65,6 @@ void *rockchip_get_cru(void);
 struct rk3288_cru;
 struct rk3288_grf;
 
 struct rk3288_cru;
 struct rk3288_grf;
 

-void rkclk_configure_cpu(struct rk3288_cru *cru, struct rk3288_grf *grf);
+void rk3288_clk_configure_cpu(struct rk3288_cru *cru, struct rk3288_grf *grf);

 
 #endif
 
 #endif

diff --git a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
index b36b6af..fc0f2f3 100644 (file)
--- a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
@@ -784,7 +784,7 @@ static int veyron_init(struct dram_info *priv)
                return ret;
        udelay(100);/* Must wait for voltage to stabilize, 2mV/us */
 
                return ret;
        udelay(100);/* Must wait for voltage to stabilize, 2mV/us */
 

-       rkclk_configure_cpu(priv->cru, priv->grf);
+       rk3288_clk_configure_cpu(priv->cru, priv->grf);

 
        return 0;
 }
 
        return 0;
 }

diff --git a/drivers/clk/clk_rk3288.c b/drivers/clk/clk_rk3288.c
index 679f010..dece4bc 100644 (file)
--- a/drivers/clk/clk_rk3288.c
+++ b/drivers/clk/clk_rk3288.c
@@ -447,7 +447,7 @@ static void rkclk_init(struct rk3288_cru *cru, struct rk3288_grf *grf)
 }
 #endif
 
 }
 #endif
 

-void rkclk_configure_cpu(struct rk3288_cru *cru, struct rk3288_grf *grf)
+void rk3288_clk_configure_cpu(struct rk3288_cru *cru, struct rk3288_grf *grf)

 {
        /* pll enter slow-mode */
        rk_clrsetreg(&cru->cru_mode_con,
 {
        /* pll enter slow-mode */
        rk_clrsetreg(&cru->cru_mode_con,