* ppc-opc.c (powerpc_opcodes): Recognize three-operand tlbsxe.

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index d090f65..71dca1b 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2007-04-19  Nathan Froyd <froydnj@codesourcery.com>
+
+       * ppc-opc.c (powerpc_opcodes): Recognize three-operand tlbsxe.
+

 2007-04-18  H.J. Lu <hongjiu.lu@intel.com>
 
        * i386-dis.c (CRC32_Fixup): New.
 2007-04-18  H.J. Lu <hongjiu.lu@intel.com>
 
        * i386-dis.c (CRC32_Fixup): New.

diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index a0b675b..41f369d 100644 (file)
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -4454,8 +4454,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
 
 { "tlbsx",   XRC(31,914,0), X_MASK,    PPC403|BOOKE,   { RTO, RA, RB } },
 { "tlbsx.",  XRC(31,914,1), X_MASK,    PPC403|BOOKE,   { RTO, RA, RB } },
 
 { "tlbsx",   XRC(31,914,0), X_MASK,    PPC403|BOOKE,   { RTO, RA, RB } },
 { "tlbsx.",  XRC(31,914,1), X_MASK,    PPC403|BOOKE,   { RTO, RA, RB } },

-{ "tlbsxe",  XRC(31,915,0), X_MASK,    BOOKE64,        { RA, RB } },
-{ "tlbsxe.", XRC(31,915,1), X_MASK,    BOOKE64,        { RA, RB } },
+{ "tlbsxe",  XRC(31,915,0), X_MASK,    BOOKE64,        { RTO, RA, RB } },
+{ "tlbsxe.", XRC(31,915,1), X_MASK,    BOOKE64,        { RTO, RA, RB } },

 
 { "slbmfee", X(31,915), XRA_MASK,      PPC64,          { RT, RB } },
 
 
 { "slbmfee", X(31,915), XRA_MASK,      PPC64,          { RT, RB } },