The current implementation assumes that the registers holding the ICIDs
are universally big endian. That's no longer the case on newer
platforms so update the code to take into account the endianness of
each register.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
int i;
for (i = 0; i < size; i++)
int i;
for (i = 0; i < size; i++)
- out_be32((u32 *)(tbl[i].reg_addr), tbl[i].reg);
+ if (tbl[i].le)
+ out_le32((u32 *)(tbl[i].reg_addr), tbl[i].reg);
+ else
+ out_be32((u32 *)(tbl[i].reg_addr), tbl[i].reg);
}
#ifdef CONFIG_SYS_DPAA_FMAN
}
#ifdef CONFIG_SYS_DPAA_FMAN
u32 reg;
phys_addr_t compat_addr;
phys_addr_t reg_addr;
u32 reg;
phys_addr_t compat_addr;
phys_addr_t reg_addr;
};
struct fman_icid_id_table {
};
struct fman_icid_id_table {
void set_icids(void);
void fdt_fixup_icid(void *blob);
void set_icids(void);
void fdt_fixup_icid(void *blob);
-#define SET_ICID_ENTRY(name, idA, regA, addr, compataddr) \
+#define SET_ICID_ENTRY(name, idA, regA, addr, compataddr, _le) \
{ .compat = name, \
.id = idA, \
.reg = regA, \
.compat_addr = compataddr, \
.reg_addr = addr, \
{ .compat = name, \
.id = idA, \
.reg = regA, \
.compat_addr = compataddr, \
.reg_addr = addr, \
+#ifdef CONFIG_SYS_FSL_CCSR_SCFG_LE
+#define SCFG_IS_LE true
+#elif defined(CONFIG_SYS_FSL_CCSR_SCFG_BE)
+#define SCFG_IS_LE false
+#endif
+
#define SET_SCFG_ICID(compat, streamid, name, compataddr) \
SET_ICID_ENTRY(compat, streamid, (((streamid) << 24) | (1 << 23)), \
offsetof(struct ccsr_scfg, name) + CONFIG_SYS_FSL_SCFG_ADDR, \
#define SET_SCFG_ICID(compat, streamid, name, compataddr) \
SET_ICID_ENTRY(compat, streamid, (((streamid) << 24) | (1 << 23)), \
offsetof(struct ccsr_scfg, name) + CONFIG_SYS_FSL_SCFG_ADDR, \
+ compataddr, SCFG_IS_LE)
#define SET_USB_ICID(usb_num, compat, streamid) \
SET_SCFG_ICID(compat, streamid, usb##usb_num##_icid,\
#define SET_USB_ICID(usb_num, compat, streamid) \
SET_SCFG_ICID(compat, streamid, usb##usb_num##_icid,\
#define SET_QDMA_ICID(compat, streamid) \
SET_ICID_ENTRY(compat, streamid, (1 << 31) | (streamid), \
QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \
#define SET_QDMA_ICID(compat, streamid) \
SET_ICID_ENTRY(compat, streamid, (1 << 31) | (streamid), \
QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \
+ QDMA_BASE_ADDR, false), \
SET_ICID_ENTRY(NULL, streamid, (1 << 31) | (streamid), \
QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \
SET_ICID_ENTRY(NULL, streamid, (1 << 31) | (streamid), \
QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \
#define SET_EDMA_ICID(streamid) \
SET_SCFG_ICID("fsl,vf610-edma", streamid, edma_icid,\
#define SET_EDMA_ICID(streamid) \
SET_SCFG_ICID("fsl,vf610-edma", streamid, edma_icid,\
SET_ICID_ENTRY("fsl,qman", streamid, streamid, \
offsetof(struct ccsr_qman, liodnr) + \
CONFIG_SYS_FSL_QMAN_ADDR, \
SET_ICID_ENTRY("fsl,qman", streamid, streamid, \
offsetof(struct ccsr_qman, liodnr) + \
CONFIG_SYS_FSL_QMAN_ADDR, \
- CONFIG_SYS_FSL_QMAN_ADDR)
+ CONFIG_SYS_FSL_QMAN_ADDR, false)
#define SET_BMAN_ICID(streamid) \
SET_ICID_ENTRY("fsl,bman", streamid, streamid, \
offsetof(struct ccsr_bman, liodnr) + \
CONFIG_SYS_FSL_BMAN_ADDR, \
#define SET_BMAN_ICID(streamid) \
SET_ICID_ENTRY("fsl,bman", streamid, streamid, \
offsetof(struct ccsr_bman, liodnr) + \
CONFIG_SYS_FSL_BMAN_ADDR, \
- CONFIG_SYS_FSL_BMAN_ADDR)
+ CONFIG_SYS_FSL_BMAN_ADDR, false)
#define SET_FMAN_ICID_ENTRY(_port_id, streamid) \
{ .port_id = (_port_id), .icid = (streamid) }
#define SET_FMAN_ICID_ENTRY(_port_id, streamid) \
{ .port_id = (_port_id), .icid = (streamid) }
+#ifdef CONFIG_SYS_FSL_SEC_LE
+#define SEC_IS_LE true
+#elif defined(CONFIG_SYS_FSL_SEC_BE)
+#define SEC_IS_LE false
+#endif
+
#define SET_SEC_QI_ICID(streamid) \
SET_ICID_ENTRY("fsl,sec-v4.0", streamid, \
0, offsetof(ccsr_sec_t, qilcr_ls) + \
CONFIG_SYS_FSL_SEC_ADDR, \
#define SET_SEC_QI_ICID(streamid) \
SET_ICID_ENTRY("fsl,sec-v4.0", streamid, \
0, offsetof(ccsr_sec_t, qilcr_ls) + \
CONFIG_SYS_FSL_SEC_ADDR, \
- CONFIG_SYS_FSL_SEC_ADDR)
+ CONFIG_SYS_FSL_SEC_ADDR, SEC_IS_LE)
#define SET_SEC_JR_ICID_ENTRY(jr_num, streamid) \
SET_ICID_ENTRY( \
#define SET_SEC_JR_ICID_ENTRY(jr_num, streamid) \
SET_ICID_ENTRY( \
(((streamid) << 16) | (streamid)), \
offsetof(ccsr_sec_t, jrliodnr[jr_num].ls) + \
CONFIG_SYS_FSL_SEC_ADDR, \
(((streamid) << 16) | (streamid)), \
offsetof(ccsr_sec_t, jrliodnr[jr_num].ls) + \
CONFIG_SYS_FSL_SEC_ADDR, \
- FSL_SEC_JR##jr_num##_BASE_ADDR)
+ FSL_SEC_JR##jr_num##_BASE_ADDR, SEC_IS_LE)
#define SET_SEC_DECO_ICID_ENTRY(deco_num, streamid) \
SET_ICID_ENTRY(NULL, streamid, (((streamid) << 16) | (streamid)), \
offsetof(ccsr_sec_t, decoliodnr[deco_num].ls) + \
#define SET_SEC_DECO_ICID_ENTRY(deco_num, streamid) \
SET_ICID_ENTRY(NULL, streamid, (((streamid) << 16) | (streamid)), \
offsetof(ccsr_sec_t, decoliodnr[deco_num].ls) + \
- CONFIG_SYS_FSL_SEC_ADDR, 0)
+ CONFIG_SYS_FSL_SEC_ADDR, 0, SEC_IS_LE)
#define SET_SEC_RTIC_ICID_ENTRY(rtic_num, streamid) \
SET_ICID_ENTRY(NULL, streamid, (((streamid) << 16) | (streamid)), \
offsetof(ccsr_sec_t, rticliodnr[rtic_num].ls) + \
#define SET_SEC_RTIC_ICID_ENTRY(rtic_num, streamid) \
SET_ICID_ENTRY(NULL, streamid, (((streamid) << 16) | (streamid)), \
offsetof(ccsr_sec_t, rticliodnr[rtic_num].ls) + \
- CONFIG_SYS_FSL_SEC_ADDR, 0)
+ CONFIG_SYS_FSL_SEC_ADDR, 0, SEC_IS_LE)
extern struct icid_id_table icid_tbl[];
extern struct fman_icid_id_table fman_icid_tbl[];
extern struct icid_id_table icid_tbl[];
extern struct fman_icid_id_table fman_icid_tbl[];